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10839866a1
llvm-mirror/lib/Target/AVR
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Craig Topper 10839866a1 [X86][MC][Target] Initial backend support a tune CPU to support -mtune 
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line.

This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned.

One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU.

I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning.

Differential Revision: https://reviews.llvm.org/D85165
2020-08-14 15:31:50 -07:00
..
AsmParser [NFC] Add 'override' keyword where missing in include/ and lib/. 2020-07-14 09:47:29 -07:00
Disassembler [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
MCTargetDesc [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
TargetInfo CMake: Make most target symbols hidden by default 2020-01-14 19:46:52 -08:00
AVR.h
AVR.td
AVRAsmPrinter.cpp [AsmPrinter][MCStreamer] De-capitalize EmitInstruction and EmitCFI* 2020-02-13 22:08:55 -08:00
AVRCallingConv.td [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
AVRDevices.td [AVR] Fix I/O instructions on XMEGA 2020-05-17 19:46:09 +12:00
AVRExpandPseudoInsts.cpp [AVR][NFC] Use Register instead of unsigned 2020-03-05 11:38:24 +08:00
AVRFrameLowering.cpp [NFC] Add 'override' keyword where missing in include/ and lib/. 2020-07-14 09:47:29 -07:00
AVRFrameLowering.h ArrayRef'ize restoreCalleeSavedRegisters. NFCI. 2020-02-29 09:50:23 +01:00
AVRInstrFormats.td [AVR] Disassemble double register instructions 2020-06-23 02:18:04 +02:00
AVRInstrInfo.cpp [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
AVRInstrInfo.h [NFC] unsigned->Register in storeRegTo/loadRegFromStack 2020-02-03 14:22:16 +01:00
AVRInstrInfo.td [AVR] Fix miscompilation of zext + add 2020-06-18 16:51:37 +02:00
AVRISelDAGToDAG.cpp [AVR][NFC] Use Register instead of unsigned 2020-03-05 11:38:24 +08:00
AVRISelLowering.cpp [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
AVRISelLowering.h [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
AVRMachineFunctionInfo.h [AVR] Generalize the previous interrupt bugfix to signal handlers too 2020-03-31 19:33:34 +13:00
AVRMCInstLower.cpp
AVRMCInstLower.h
AVRRegisterInfo.cpp [AVR] Generalize the previous interrupt bugfix to signal handlers too 2020-03-31 19:33:34 +13:00
AVRRegisterInfo.h [AVR][NFC] Use Register instead of unsigned 2020-03-05 11:38:24 +08:00
AVRRegisterInfo.td [AVR] Rewrite the function calling convention. 2020-06-23 21:36:18 +12:00
AVRRelaxMemOperations.cpp
AVRSelectionDAGInfo.h
AVRSubtarget.cpp [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
AVRSubtarget.h [X86][MC][Target] Initial backend support a tune CPU to support -mtune 2020-08-14 15:31:50 -07:00
AVRTargetMachine.cpp Fix AVR build after 777180a32b6107 2020-01-28 19:22:22 -05:00
AVRTargetMachine.h
AVRTargetObjectFile.cpp [AVR] Do not place functions in .progmem.data 2020-04-20 13:56:38 +02:00
AVRTargetObjectFile.h
CMakeLists.txt
LLVMBuild.txt
README.md
TODO.md

README.md

AVR backend

This experimental backend is for the 8-bit Atmel AVR microcontroller.

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