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PrologEpilog code, and use it to determine whether the asm forces stack alignment or not. gcc consistently does not do this for GCC-style asms; Apple gcc inconsistently sometimes does it for asm blocks. There is no convenient place to put a bit in either the SDNode or the MachineInstr form, so I've added an extra operand to each; unlovely, but it does allow for expansion for more bits, should we need it. PR 5125. Some existing testcases are affected. The operand lists of the SDNode and MachineInstr forms are indexed with awesome mnemonics, like "2"; I may fix this someday, but not now. I'm not making it any worse. If anyone is inspired I think you can find all the right places from this patch. llvm-svn: 107506
20 lines
852 B
LLVM
20 lines
852 B
LLVM
; RUN: llc < %s -mtriple=i386-apple-darwin9 -O0 -regalloc=linearscan | grep {movl %edx, 4(%esp)} | count 2
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; rdar://6992609
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target triple = "i386-apple-darwin9.0"
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@llvm.used = appending global [1 x i8*] [i8* bitcast (i64 (i64)* @_OSSwapInt64 to i8*)], section "llvm.metadata" ; <[1 x i8*]*> [#uses=0]
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define i64 @_OSSwapInt64(i64 %_data) nounwind {
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entry:
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%retval = alloca i64 ; <i64*> [#uses=2]
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%_data.addr = alloca i64 ; <i64*> [#uses=4]
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store i64 %_data, i64* %_data.addr
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%tmp = load i64* %_data.addr ; <i64> [#uses=1]
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%0 = call i64 asm "bswap %eax\0A\09bswap %edx\0A\09xchgl %eax, %edx", "=A,0,~{dirflag},~{fpsr},~{flags}"(i64 %tmp) nounwind ; <i64> [#uses=1]
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store i64 %0, i64* %_data.addr
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%tmp1 = load i64* %_data.addr ; <i64> [#uses=1]
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store i64 %tmp1, i64* %retval
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%1 = load i64* %retval ; <i64> [#uses=1]
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ret i64 %1
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}
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