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2f13163a84
This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. llvm-svn: 205090
30 lines
742 B
LLVM
30 lines
742 B
LLVM
; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
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define <2 x double> @f1(<2 x i32> %v) nounwind readnone {
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; CHECK-LABEL: f1:
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; CHECK: sshll.2d v0, v0, #0
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; CHECK-NEXT: scvtf.2d v0, v0
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; CHECK-NEXT: ret
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%conv = sitofp <2 x i32> %v to <2 x double>
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ret <2 x double> %conv
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}
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define <2 x double> @f2(<2 x i32> %v) nounwind readnone {
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; CHECK-LABEL: f2:
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; CHECK: ushll.2d v0, v0, #0
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; CHECK-NEXT: ucvtf.2d v0, v0
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; CHECK-NEXT: ret
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%conv = uitofp <2 x i32> %v to <2 x double>
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ret <2 x double> %conv
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}
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; CHECK: autogen_SD19655
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; CHECK: scvtf
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; CHECK: ret
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define void @autogen_SD19655() {
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%T = load <2 x i64>* undef
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%F = sitofp <2 x i64> undef to <2 x float>
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store <2 x float> %F, <2 x float>* undef
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ret void
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}
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