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Emit 32-bit register names instead of 64-bit register names if the target does not have 64-bit general purpose registers. <rdar://problem/14653996> llvm-svn: 205067
13 lines
348 B
LLVM
13 lines
348 B
LLVM
; RUN: llc < %s -march=x86 -no-integrated-as | FileCheck %s
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; If the target does not have 64-bit integer registers, emit 32-bit register
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; names.
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; CHECK: movq (%e{{[abcd]}}x, %ebx, 4)
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define void @q_modifier(i32* %p) {
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entry:
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tail call void asm sideeffect "movq (${0:q}, %ebx, 4), %mm0", "r,~{dirflag},~{fpsr},~{flags}"(i32* %p)
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ret void
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}
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