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The custom code produces incorrect results if later reassociated. Since r221657, on x86, vNi32 uitofp is lowered using an optimized sequence: movdqa LCPI0_0(%rip), %xmm1 ## xmm1 = [65535, ...] pand %xmm0, %xmm1 por LCPI0_1(%rip), %xmm1 ## [0x4b000000, ...] psrld $16, %xmm0 por LCPI0_2(%rip), %xmm0 ## [0x53000000, ...] addps LCPI0_3(%rip), %xmm0 ## [float -5.497642e+11, ...] addps %xmm1, %xmm0 Since r240361, the machine combiner opportunistically reassociates 2-instruction sequences (with -ffast-math). In the new code sequence, the ADDPS' are eligible. In isolation, for simple examples (without reassociable users), this makes no performance difference (the goal being to enable reassociation of longer chains). In the trivial example (just one uitofp), the reassociation doesn't happen, because (I think) it would require the emission of a separate movaps for a constantpool load (instead of folding it into addps). However, when we have multiple uitofp sequences, and the constantpool loads are CSE'd earlier, the machine combiner can do the reassociation. When the ADDPS' are reassociated, the resulting sequence isn't correct anymore, as we'd be adding large (2**39) constants with comparatively smaller values (~2**23). Given that two of the three inputs are powers of 2 larger than 2**16, and that ulp(2**39) == 2**(39-24) == 2**15, the reassociated chain will produce 0 for any input in [0, 2**14[. In my testing, it also produces wrong results for 99.5% of [0, 2**32[. Avoid this by disabling the new lowering when -ffast-math. It does mean that we'll get slower code than without it, but at least we won't get egregiously incorrect code. One might argue that, considering -ffast-math is all but meaningless, uitofp producing wrong results isn't a compiler bug. But it really is. Fixes PR24512. ...though this is really more of a workaround. Ideally, we'd have some sort of Machine FMF, but that's a problem that's not worth tackling until we do more with machine IR. llvm-svn: 248965
131 lines
4.8 KiB
LLVM
131 lines
4.8 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math \
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; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=SSE --check-prefix=CST
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+sse4.1 \
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; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=SSE --check-prefix=CST
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx \
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; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AVX --check-prefix=CST
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; RUN: llc < %s -mtriple=x86_64 -enable-unsafe-fp-math -mattr=+avx2 \
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; RUN: | FileCheck %s --check-prefix=CHECK --check-prefix=AVX2
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; CST: [[MASKCSTADDR:.LCPI[0-9_]+]]:
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; CST-NEXT: .long 65535 # 0xffff
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; CST-NEXT: .long 65535 # 0xffff
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; CST-NEXT: .long 65535 # 0xffff
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; CST-NEXT: .long 65535 # 0xffff
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; CST: [[FPMASKCSTADDR:.LCPI[0-9_]+]]:
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; CST-NEXT: .long 1199570944 # float 6.553600e+04
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; CST-NEXT: .long 1199570944 # float 6.553600e+04
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; CST-NEXT: .long 1199570944 # float 6.553600e+04
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; CST-NEXT: .long 1199570944 # float 6.553600e+04
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; AVX2: [[FPMASKCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1199570944 # float 65536
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; AVX2: [[MASKCSTADDR:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 65535 # 0xffff
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define <4 x float> @test_uitofp_v4i32_to_v4f32(<4 x i32> %arg) {
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; SSE-LABEL: test_uitofp_v4i32_to_v4f32:
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; SSE: # BB#0:
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; SSE-NEXT: movaps {{.*#+}} xmm1 = [65535,65535,65535,65535]
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; SSE-NEXT: andps %xmm0, %xmm1
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; SSE-NEXT: cvtdq2ps %xmm1, %xmm1
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; SSE-NEXT: psrld $16, %xmm0
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; SSE-NEXT: cvtdq2ps %xmm0, %xmm0
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; SSE-NEXT: mulps [[FPMASKCSTADDR]](%rip), %xmm0
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; SSE-NEXT: addps %xmm1, %xmm0
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX: # BB#0:
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; AVX-NEXT: vandps [[MASKCSTADDR]](%rip), %xmm0, %xmm1
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; AVX-NEXT: vcvtdq2ps %xmm1, %xmm1
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; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
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; AVX-NEXT: vcvtdq2ps %xmm0, %xmm0
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; AVX-NEXT: vmulps [[FPMASKCSTADDR]](%rip), %xmm0, %xmm0
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; AVX-NEXT: vaddps %xmm1, %xmm0, %xmm0
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; AVX-NEXT: retq
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;
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; AVX2-LABEL: test_uitofp_v4i32_to_v4f32:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpsrld $16, %xmm0, %xmm1
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; AVX2-NEXT: vcvtdq2ps %xmm1, %xmm1
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; AVX2-NEXT: vbroadcastss [[FPMASKCSTADDR]](%rip), %xmm2
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; AVX2-NEXT: vmulps %xmm2, %xmm1, %xmm1
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; AVX2-NEXT: vpbroadcastd [[MASKCSTADDR]](%rip), %xmm2
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; AVX2-NEXT: vpand %xmm2, %xmm0, %xmm0
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; AVX2-NEXT: vcvtdq2ps %xmm0, %xmm0
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; AVX2-NEXT: vaddps %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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%tmp = uitofp <4 x i32> %arg to <4 x float>
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ret <4 x float> %tmp
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}
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; AVX: [[MASKCSTADDR_v8:.LCPI[0-9_]+]]:
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; AVX-NEXT: .long 65535 # 0xffff
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; AVX-NEXT: .long 65535 # 0xffff
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; AVX-NEXT: .long 65535 # 0xffff
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; AVX-NEXT: .long 65535 # 0xffff
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; AVX: [[FPMASKCSTADDR_v8:.LCPI[0-9_]+]]:
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; AVX-NEXT: .long 1199570944 # float 6.553600e+04
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; AVX-NEXT: .long 1199570944 # float 6.553600e+04
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; AVX-NEXT: .long 1199570944 # float 6.553600e+04
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; AVX-NEXT: .long 1199570944 # float 6.553600e+04
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; AVX2: [[FPMASKCSTADDR_v8:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 1199570944 # float 65536
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; AVX2: [[MASKCSTADDR_v8:.LCPI[0-9_]+]]:
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; AVX2-NEXT: .long 65535 # 0xffff
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define <8 x float> @test_uitofp_v8i32_to_v8f32(<8 x i32> %arg) {
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; SSE-LABEL: test_uitofp_v8i32_to_v8f32:
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; SSE: # BB#0:
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; SSE-NEXT: movdqa %xmm0, %xmm2
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; SSE-NEXT: psrld $16, %xmm2
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; SSE-NEXT: cvtdq2ps %xmm2, %xmm2
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; SSE-NEXT: movaps {{.*#+}} xmm3 = [6.553600e+04,6.553600e+04,6.553600e+04,6.553600e+04]
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; SSE-NEXT: mulps %xmm3, %xmm2
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; SSE-NEXT: movdqa {{.*#+}} xmm4 = [65535,65535,65535,65535]
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; SSE-NEXT: pand %xmm4, %xmm0
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; SSE-NEXT: cvtdq2ps %xmm0, %xmm0
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; SSE-NEXT: addps %xmm2, %xmm0
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; SSE-NEXT: movdqa %xmm1, %xmm2
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; SSE-NEXT: psrld $16, %xmm2
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; SSE-NEXT: cvtdq2ps %xmm2, %xmm2
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; SSE-NEXT: mulps %xmm3, %xmm2
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; SSE-NEXT: pand %xmm4, %xmm1
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; SSE-NEXT: cvtdq2ps %xmm1, %xmm1
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; SSE-NEXT: addps %xmm2, %xmm1
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; SSE-NEXT: retq
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;
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; AVX-LABEL: test_uitofp_v8i32_to_v8f32:
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; AVX: # BB#0:
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; AVX-NEXT: vandps [[MASKCSTADDR_v8]](%rip), %ymm0, %ymm1
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; AVX-NEXT: vcvtdq2ps %ymm1, %ymm1
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; AVX-NEXT: vpsrld $16, %xmm0, %xmm2
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; AVX-NEXT: vextractf128 $1, %ymm0, %xmm0
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; AVX-NEXT: vpsrld $16, %xmm0, %xmm0
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; AVX-NEXT: vinsertf128 $1, %xmm0, %ymm2, %ymm0
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; AVX-NEXT: vcvtdq2ps %ymm0, %ymm0
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; AVX-NEXT: vmulps [[FPMASKCSTADDR_v8]](%rip), %ymm0, %ymm0
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; AVX-NEXT: vaddps %ymm1, %ymm0, %ymm0
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; AVX-NEXT: retq
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;
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; AVX2-LABEL: test_uitofp_v8i32_to_v8f32:
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; AVX2: # BB#0:
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; AVX2-NEXT: vpsrld $16, %ymm0, %ymm1
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; AVX2-NEXT: vcvtdq2ps %ymm1, %ymm1
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; AVX2-NEXT: vbroadcastss [[FPMASKCSTADDR_v8]](%rip), %ymm2
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; AVX2-NEXT: vmulps %ymm2, %ymm1, %ymm1
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; AVX2-NEXT: vpbroadcastd [[MASKCSTADDR_v8]](%rip), %ymm2
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; AVX2-NEXT: vpand %ymm2, %ymm0, %ymm0
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; AVX2-NEXT: vcvtdq2ps %ymm0, %ymm0
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; AVX2-NEXT: vaddps %ymm0, %ymm1, %ymm0
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; AVX2-NEXT: retq
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%tmp = uitofp <8 x i32> %arg to <8 x float>
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ret <8 x float> %tmp
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}
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