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ead0e16c6e
This patch does the following: * Fix FIXME on `needsStackRealignment`: it is now shared between multiple targets, implemented in `TargetRegisterInfo`, and isn't `virtual` anymore. This will break out-of-tree targets, silently if they used `virtual` and with a build error if they used `override`. * Factor out `canRealignStack` as a `virtual` function on `TargetRegisterInfo`, by default only looks for the `no-realign-stack` function attribute. Multiple targets duplicated the same `needsStackRealignment` code: - Aarch64. - ARM. - Mips almost: had extra `DEBUG` diagnostic, which the default implementation now has. - PowerPC. - WebAssembly. - x86 almost: has an extra `-force-align-stack` option, which the default implementation now has. The default implementation of `needsStackRealignment` used to just return `false`. My current patch changes the behavior by simply using the above shared behavior. This affects: - AMDGPU - BPF - CppBackend - MSP430 - NVPTX - Sparc - SystemZ - XCore - Out-of-tree targets This is a breaking change! `make check` passes. The only implementation of the `virtual` function (besides the slight different in x86) was Hexagon (which did `MF.getFrameInfo()->getMaxAlignment() > 8`), and potentially some out-of-tree targets. Hexagon now uses the default implementation. `needsStackRealignment` was being overwritten in `<Target>GenRegisterInfo.inc`, to return `false` as the default also did. That was odd and is now gone. Reviewers: sunfish Subscribers: aemerson, llvm-commits, jfb Differential Revision: http://reviews.llvm.org/D11160 llvm-svn: 242727
49 lines
1.5 KiB
C++
49 lines
1.5 KiB
C++
// WebAssemblyRegisterInfo.h - WebAssembly Register Information Impl -*- C++ -*-
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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///
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/// \file
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/// \brief This file contains the WebAssembly implementation of the
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/// WebAssemblyRegisterInfo class.
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///
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERINFO_H
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#define LLVM_LIB_TARGET_WEBASSEMBLY_WEBASSEMBLYREGISTERINFO_H
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#define GET_REGINFO_HEADER
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#include "WebAssemblyGenRegisterInfo.inc"
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namespace llvm {
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class MachineFunction;
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class RegScavenger;
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class TargetRegisterClass;
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class Triple;
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class WebAssemblyRegisterInfo final : public WebAssemblyGenRegisterInfo {
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const Triple &TT;
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public:
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explicit WebAssemblyRegisterInfo(const Triple &TT);
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// Code Generation virtual methods.
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const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override;
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BitVector getReservedRegs(const MachineFunction &MF) const override;
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void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj,
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unsigned FIOperandNum,
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RegScavenger *RS = nullptr) const override;
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// Debug information queries.
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unsigned getFrameRegister(const MachineFunction &MF) const override;
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};
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} // end namespace llvm
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#endif
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