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llvm-mirror/test/CodeGen
Alex Lorenz 1167a86bcb MIR Serialization: Initial serialization of the machine memory operands.
Reviewers: Duncan P. N. Exon Smith
llvm-svn: 243915
2015-08-03 23:08:19 +00:00
..
AArch64 DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
AMDGPU AMDGPU/SI: Add implicit register operands in the correct order. 2015-07-31 23:30:09 +00:00
ARM DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
BPF
CPP
Generic DI: Remove DW_TAG_arg_variable and DW_TAG_auto_variable 2015-07-31 18:58:39 +00:00
Hexagon DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
Inputs DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
Mips [mips][FastISel] Remove hidden mips-fast-isel option. 2015-07-30 12:39:33 +00:00
MIR MIR Serialization: Initial serialization of the machine memory operands. 2015-08-03 23:08:19 +00:00
MSP430
NVPTX [NVPTX] allow register copy between float and int 2015-08-01 18:02:12 +00:00
PowerPC DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
SPARC [SPARC] Cleanup handling of the Y/ASR registers. 2015-07-08 16:25:12 +00:00
SystemZ
Thumb DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
Thumb2 ARMLoadStoreOptimizer: Create LDRD/STRD on thumb2 2015-07-21 00:18:59 +00:00
WebAssembly WebAssembly: implement getScalarShiftAmountTy so we can shift by amount, with type 2015-08-03 00:00:11 +00:00
WinEH [WinEH] Strip the \01 character from the __CxxFrameHandler3 thunk name 2015-07-13 17:55:14 +00:00
X86 DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00
XCore DI: Disallow uniquable DICompileUnits 2015-08-03 17:26:41 +00:00