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llvm-mirror/test/MC/ARM/armv8a-fpmul.s
Bernard Ogden 1a1a8110d3 [ARM/AArch64] Support FP16 +fp16fml instructions 
Add +fp16fml feature for new FP16 instructions, which are a
mandatory part of FP16 from v8.4-A and an optional part of FP16
from v8.2-A. It doesn't seem to be possible to model this in
LLVM, but the relationship between the options is handled by
the related clang patch.

In keeping with what I think is the usual practice, the fp16fml
extension is accepted regardless of base architecture version.

Builds on/replaces Sjoerd Meijer's patch to add these instructions at
https://reviews.llvm.org/D49839.

Differential Revision: https://reviews.llvm.org/D50228

llvm-svn: 340013
2018-08-17 11:29:49 +00:00

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// RUN: llvm-mc -triple arm -mattr=+fp16fml,+neon -show-encoding < %s | FileCheck %s --check-prefix=CHECK
// RUN: llvm-mc -triple thumb -mattr=+fp16fml,+neon -show-encoding < %s | FileCheck %s --check-prefix=CHECK-T32
// RUN: llvm-mc -triple arm -mattr=-fullfp16,+fp16fml,+neon -show-encoding < %s | FileCheck %s --check-prefix=CHECK
// RUN: llvm-mc -triple thumb -mattr=-fullfp16,+fp16fml,+neon -show-encoding < %s | FileCheck %s --check-prefix=CHECK-T32
// RUN: not llvm-mc -triple arm -mattr=+v8.2a -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML-NOR-NEON < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML-NOR-NEON < %t %s
// RUN: not llvm-mc -triple arm -mattr=+v8.2a,+neon -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a,+neon -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple arm -mattr=+v8.2a,+neon,+fp16fml,-fp16fml -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a,+neon,+fp16fml,-fp16fml -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple arm -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a,+neon,+fullfp16 -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple arm -mattr=+v8.2a,+neon,+fp16fml,-fullfp16 -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a,+neon,+fp16fml,-fullfp16 -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-FP16FML < %t %s
// RUN: not llvm-mc -triple arm -mattr=+v8.2a,+fp16fml -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-NEON < %t %s
// RUN: not llvm-mc -triple thumb -mattr=+v8.2a,+fp16fml -show-encoding < %s 2> %t
// RUN: FileCheck --check-prefix=CHECK-NO-NEON < %t %s
VFMAL.F16 D0, S1, S2
vfmsl.f16 d0, s1, s2
vfmal.f16 q0, d1, d2
VFMSL.F16 Q0, D1, D2
VFMAL.F16 D0, S1, S2[1]
vfmsl.f16 d0, s1, s2[1]
vfmal.f16 q0, d1, d2[3]
VFMSL.F16 Q0, D1, D2[3]
//CHECK: vfmal.f16 d0, s1, s2 @ encoding: [0x91,0x08,0x20,0xfc]
//CHECK: vfmsl.f16 d0, s1, s2 @ encoding: [0x91,0x08,0xa0,0xfc]
//CHECK: vfmal.f16 q0, d1, d2 @ encoding: [0x52,0x08,0x21,0xfc]
//CHECK: vfmsl.f16 q0, d1, d2 @ encoding: [0x52,0x08,0xa1,0xfc]
//CHECK: vfmal.f16 d0, s1, s2[1] @ encoding: [0x99,0x08,0x00,0xfe]
//CHECK: vfmsl.f16 d0, s1, s2[1] @ encoding: [0x99,0x08,0x10,0xfe]
//CHECK: vfmal.f16 q0, d1, d2[3] @ encoding: [0x7a,0x08,0x01,0xfe]
//CHECK: vfmsl.f16 q0, d1, d2[3] @ encoding: [0x7a,0x08,0x11,0xfe]
//CHECK-T32: vfmal.f16 d0, s1, s2 @ encoding: [0x20,0xfc,0x91,0x08]
//CHECK-T32: vfmsl.f16 d0, s1, s2 @ encoding: [0xa0,0xfc,0x91,0x08]
//CHECK-T32: vfmal.f16 q0, d1, d2 @ encoding: [0x21,0xfc,0x52,0x08]
//CHECK-T32: vfmsl.f16 q0, d1, d2 @ encoding: [0xa1,0xfc,0x52,0x08]
//CHECK-T32: vfmal.f16 d0, s1, s2[1] @ encoding: [0x00,0xfe,0x99,0x08]
//CHECK-T32: vfmsl.f16 d0, s1, s2[1] @ encoding: [0x10,0xfe,0x99,0x08]
//CHECK-T32: vfmal.f16 q0, d1, d2[3] @ encoding: [0x01,0xfe,0x7a,0x08]
//CHECK-T32: vfmsl.f16 q0, d1, d2[3] @ encoding: [0x11,0xfe,0x7a,0x08]
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML: instruction requires: full half-float fml{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-FP16FML-NOR-NEON: instruction requires: full half-float fml NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
//CHECK-NO-NEON: instruction requires: NEON{{$}}
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