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https://github.com/RPCS3/llvm-mirror.git
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ddd200c2a0
This follows other patches that changed printing immediate values of branch instructions to target addresses, see D76580 (x86), D76591 (PPC), D77853 (AArch64). As observing immediate values might sometimes be useful, they are printed as comments for branch instructions. // llvm-objdump -d output (before) 000200b4 <_start>: 200b4: ff ff ff fa blx #-4 <thumb> 000200b8 <thumb>: 200b8: ff f7 fc ef blx #-8 <_start> // llvm-objdump -d output (after) 000200b4 <_start>: 200b4: ff ff ff fa blx 0x200b8 <thumb> @ imm = #-4 000200b8 <thumb>: 200b8: ff f7 fc ef blx 0x200b4 <_start> @ imm = #-8 // GNU objdump -d. 000200b4 <_start>: 200b4: faffffff blx 200b8 <thumb> 000200b8 <thumb>: 200b8: f7ff effc blx 200b4 <_start> Differential Revision: https://reviews.llvm.org/D104701
124 lines
2.8 KiB
ArmAsm
124 lines
2.8 KiB
ArmAsm
@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
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@ RUN: | llvm-readobj -r - | FileCheck %s -check-prefix CHECK-RELOCATION
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@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
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@ RUN: | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-ENCODING
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@ RUN: llvm-mc -triple thumbv7-windows-itanium -filetype obj -o - %s \
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@ RUN: | llvm-objdump -s - | FileCheck %s --check-prefix=CHECK-DATA
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.syntax unified
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.text
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.thumb
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.global target
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.thumb_func
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branch24t_0:
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b target
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@ CHECK-ENCODING-LABEL: <branch24t_0>:
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@ CHECK-ENCODING-NEXT: b.w {{.+}} @ imm = #0
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.thumb_func
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branch24t_1:
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bl target
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@ CHECK-ENCODING-LABEL: <branch24t_1>:
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@ CHECK-ENCODING-NEXR: bl {{.+}} @ imm = #0
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.thumb_func
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branch20t:
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bcc target
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@ CHECK-ENCODING-LABEL: <branch20t>:
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@ CHECK-ENCODING-NEXT: blo.w {{.+}} @ imm = #0
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.thumb_func
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blx23t:
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blx target
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@ CHECK-ENCODING-LABEL: <blx23t>:
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@ CHECK-ENCODING-NEXT: blx {{.+}} @ imm = #0
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.thumb_func
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mov32t:
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movw r0, :lower16:target
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movt r0, :upper16:target
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blx r0
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@ CHECK-ENCODING-LABEL: <mov32t>:
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@ CHECK-ENCODING-NEXT: movw r0, #0
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@ CHECK-ENCODING-NEXT: movt r0, #0
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@ CHECK-ENCODING-NEXT: blx r0
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.thumb_func
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addr32:
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ldr r0, .Laddr32
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bx r0
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trap
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.Laddr32:
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.long target
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@ CHECK-ENCODING-LABEL: <addr32>:
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@ CHECK-ENCODING-NEXT: ldr r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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.thumb_func
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addr32nb:
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ldr r0, .Laddr32nb
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bx r0
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trap
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.Laddr32nb:
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.long target(imgrel)
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@ CHECK-ENCODING-LABEL: <addr32nb>:
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@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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.thumb_func
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secrel:
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ldr r0, .Lsecrel
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bx r0
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trap
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.Lsecrel:
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.long target(secrel32)
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.section .rdata, "dr"
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.Ltable:
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.word addr32nb - .Ltable
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.word secrel - .Ltable
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@ CHECK-ENCODING-LABEL: <secrel>:
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@ CHECK-ENCODING-NEXT: ldr.w r0, [pc, #4]
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@ CHECK-ENCODING-NEXT: bx r0
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@ CHECK-ENCODING-NEXT: trap
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-ENCODING-NEXT: movs r0, r0
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@ CHECK-RELOCATION: Relocations [
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@ CHECK-RELOCATION: Section (1) .text {
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@ CHECK-RELOCATION: 0x0 IMAGE_REL_ARM_BRANCH24T
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@ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_BRANCH24T
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@ CHECK-RELOCATION: 0x8 IMAGE_REL_ARM_BRANCH20T
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@ CHECK-RELOCATION: 0xC IMAGE_REL_ARM_BLX23T
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@ CHECK-RELOCATION: 0x10 IMAGE_REL_ARM_MOV32T
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@ CHECK-RELOCATION: 0x20 IMAGE_REL_ARM_ADDR32
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@ CHECK-RELOCATION: 0x2C IMAGE_REL_ARM_ADDR32NB
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@ CHECK-RELOCATION: 0x38 IMAGE_REL_ARM_SECREL
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@ CHECK-RELOCATION: }
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@ CHECK-RELOCATION: Section (4) .rdata {
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@ CHECK-RELOCATION: 0x0 IMAGE_REL_ARM_REL32
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@ CHECK-RELOCATION: 0x4 IMAGE_REL_ARM_REL32
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@ CHECK-RELOCATION: }
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@ CHECK-RELOCATION: ]
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@ CHECK-DATA: Contents of section .rdata:
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@ CHECK-DATA-NEXT: 0000 04000000 08000000
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