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adcde70583
The FPU directive permits the user to switch the target FPU, enabling instructions that would be otherwise unavailable. However, when configuring the new subtarget features, we would not enable the implied functions for newer FPUs. This would result in invalid rejection of valid input. Ensure that we inherit the implied FPU functionality when enabling newer versions of the FPU. Fortunately, these are mostly hierarchical, unlike the CPUs. Addresses PR22395. llvm-svn: 227584
64 lines
1.4 KiB
ArmAsm
64 lines
1.4 KiB
ArmAsm
@ RUN: llvm-mc -triple armv4t-eabi -filetype asm -o - %s 2>&1 | FileCheck %s
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.text
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.thumb
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.p2align 2
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.fpu neon
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vldmia r0, {d16-d31}
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@ CHECK: vldmia r0, {d16, d17, d18, d19, d20, d21, d22, d23, d24, d25, d26, d27, d28, d29, d30, d31}
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@ CHECK-NOT: error: instruction requires: VFP2
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.fpu vfpv3
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu vfpv3-d16
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu vfpv4
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu vfpv4-d16
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu fpv5-d16
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu fp-armv8
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu fp-armv8
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu neon
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu neon-vfpv4
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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.fpu crypto-neon-fp-armv8
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vadd.f32 s1, s2, s3
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@ CHECK: vadd.f32 s1, s2, s3
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@ CHECK-NOT: error: instruction requires: VPF2
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