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ce3aa09426
Add VCMP/VCPS/VCPX/VCMS/VCMX vector instructions. Also add regression tests. Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D89643
77 lines
2.8 KiB
ArmAsm
77 lines
2.8 KiB
ArmAsm
# RUN: llvm-mc -triple=ve --show-encoding < %s \
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# RUN: | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
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# RUN: llvm-mc -triple=ve -filetype=obj < %s | llvm-objdump -d - \
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# RUN: | FileCheck %s --check-prefixes=CHECK-INST
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# CHECK-INST: vmaxs.w.sx %v11, %s20, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x20,0x8a]
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vmaxs.w.sx %v11, %s20, %v22
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# CHECK-INST: vmaxs.w.sx %vix, %vix, %vix
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# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x00,0x8a]
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vmaxs.w.sx %vix, %vix, %vix
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# CHECK-INST: pvmaxs.lo %vix, 22, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0x8a]
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vmaxs.w.zx %vix, 22, %v22
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# CHECK-INST: pvmaxs.lo %vix, 22, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x60,0x8a]
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vmaxs.w %vix, 22, %v22
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# CHECK-INST: pvmaxs.lo %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0x8a]
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pvmaxs.lo %v11, 63, %v22, %vm11
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# CHECK-INST: vmaxs.w.sx %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x2b,0x8a]
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pvmaxs.lo.sx %v11, 63, %v22, %vm11
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# CHECK-INST: pvmaxs.lo %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x6b,0x8a]
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pvmaxs.lo.zx %v11, 63, %v22, %vm11
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# CHECK-INST: pvmaxs.up %v11, %vix, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x8b,0x8a]
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pvmaxs.up %v11, %vix, %v22, %vm11
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# CHECK-INST: pvmaxs %v12, %v20, %v22, %vm12
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# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xcc,0x8a]
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pvmaxs %v12, %v20, %v22, %vm12
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# CHECK-INST: vmins.w.sx %v11, %s20, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x94,0x30,0x8a]
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vmins.w.sx %v11, %s20, %v22
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# CHECK-INST: vmins.w.sx %vix, %vix, %vix
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# CHECK-ENCODING: encoding: [0x00,0xff,0xff,0xff,0x00,0x00,0x10,0x8a]
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vmins.w.sx %vix, %vix, %vix
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# CHECK-INST: pvmins.lo %vix, 22, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x70,0x8a]
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vmins.w.zx %vix, 22, %v22
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# CHECK-INST: pvmins.lo %vix, 22, %v22
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0xff,0x00,0x16,0x70,0x8a]
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vmins.w %vix, 22, %v22
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# CHECK-INST: pvmins.lo %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x7b,0x8a]
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pvmins.lo %v11, 63, %v22, %vm11
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# CHECK-INST: vmins.w.sx %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x3b,0x8a]
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pvmins.lo.sx %v11, 63, %v22, %vm11
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# CHECK-INST: pvmins.lo %v11, 63, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0x00,0x0b,0x00,0x3f,0x7b,0x8a]
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pvmins.lo.zx %v11, 63, %v22, %vm11
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# CHECK-INST: pvmins.up %v11, %vix, %v22, %vm11
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# CHECK-ENCODING: encoding: [0x00,0x16,0xff,0x0b,0x00,0x00,0x9b,0x8a]
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pvmins.up %v11, %vix, %v22, %vm11
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# CHECK-INST: pvmins %v12, %v20, %v22, %vm12
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# CHECK-ENCODING: encoding: [0x00,0x16,0x14,0x0c,0x00,0x00,0xdc,0x8a]
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pvmins %v12, %v20, %v22, %vm12
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