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8ed6f090ef
Changed tests which assumed that vectors are legalized by widening them. llvm-svn: 142152
12 lines
299 B
LLVM
12 lines
299 B
LLVM
; RUN: llc < %s -march=x86 -mattr=+sse42 | FileCheck %s
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; CHECK-NOT: cvtsi2ss
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; unsigned to float v7i16 to v7f32
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define void @convert(<7 x float>* %dst.addr, <7 x i16> %src) nounwind {
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entry:
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%val = sitofp <7 x i16> %src to <7 x float>
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store <7 x float> %val, <7 x float>* %dst.addr
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ret void
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}
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