1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 12:33:33 +02:00
llvm-mirror/test/CodeGen/MIR/X86/expected-register-after-cfi-operand.mir
Alex Lorenz c21c095194 MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

llvm-svn: 244982
2015-08-13 23:10:16 +00:00

43 lines
1.3 KiB
YAML

# RUN: not llc -march=x86-64 -start-after branch-folder -stop-after branch-folder -o /dev/null %s 2>&1 | FileCheck %s
--- |
declare void @foo(i32)
define i32 @test(i32 %a, i32 %b, i32 %c, i32 %d) {
entry:
%add = add nsw i32 %b, %a
%add1 = add nsw i32 %add, %c
%add2 = add nsw i32 %add1, %d
tail call void @foo(i32 %add2)
%add6 = add nsw i32 %add2, %add2
ret i32 %add6
}
...
---
name: test
tracksRegLiveness: true
frameInfo:
stackSize: 8
adjustsStack: true
hasCalls: true
fixedStack:
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16 }
body: |
bb.0.entry:
PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
CFI_INSTRUCTION .cfi_def_cfa_offset 16
; CHECK: [[@LINE+1]]:33: expected a cfi register
CFI_INSTRUCTION .cfi_offset %0, -16
%ebx = COPY %edi, implicit-def %rbx
%ebx = ADD32rr %ebx, killed %esi, implicit-def dead %eflags
%ebx = ADD32rr %ebx, killed %edx, implicit-def dead %eflags
%ebx = ADD32rr %ebx, killed %ecx, implicit-def dead %eflags
%edi = COPY %ebx
CALL64pcrel32 @foo, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp
%eax = LEA64_32r killed %rbx, 1, %rbx, 0, _
%rbx = POP64r implicit-def %rsp, implicit %rsp
RETQ %eax
...