Daniel Dunbar a496d61c01 [tests] Cleanup initialization of test suffixes. ... - Instead of setting the suffixes in a bunch of places, just set one master list in the top-level config. We now only modify the suffix list in a few suites that have one particular unique suffix (.ml, .mc, .yaml, .td, .py). - Aside from removing the need for a bunch of lit.local.cfg files, this enables 4 tests that were inadvertently being skipped (one in Transforms/BranchFolding, a .s file each in DebugInfo/AArch64 and CodeGen/PowerPC, and one in CodeGen/SI which is now failing and has been XFAILED). - This commit also fixes a bunch of config files to use config.root instead of older copy-pasted code. llvm-svn: 188513		2013-08-16 00:37:11 +00:00
..
arm-LDREXD-reencoding.txt	ARM: Fix STREX/LDREX reecoding	2013-06-11 08:03:20 +00:00
arm-STREXD-reencoding.txt	ARM: Fix STREX/LDREX reecoding	2013-06-11 08:03:20 +00:00
arm-tests.txt	This reverts r155000.	2013-06-20 17:42:36 +00:00
arm-thumb-trustzone.txt
arm-trustzone.txt
basic-arm-instructions.txt	ARM: ISB cannot be passed the same options as DMB	2013-06-10 14:17:08 +00:00
fp-encoding.txt	This patch adds support for FPINST/FPINST2 as operands to vmsr/vmrs. These are optional registers that may be supported some ARM implementations to aid with resolution of floating point exceptions. The manual pages for vmsr and vmrs do not detail their use. Encodings and other information can be found in ARM Architecture Reference Manual section F, chapter 6, paragraph 3.	2013-06-11 09:39:51 +00:00
hex-immediates.txt
invalid-armv7.txt	Add not so that these tests pass with pipefail enabled.	2013-07-23 13:18:20 +00:00
invalid-because-armv7.txt	Add not so that these tests pass with pipefail enabled.	2013-07-23 13:18:20 +00:00
invalid-FSTMX-arm.txt
invalid-IT-CC15.txt
invalid-thumbv7-xfail.txt	Improve llvm-mc disassembler mode and refactor ARM tests to use it	2013-07-19 10:05:04 +00:00
invalid-thumbv7.txt	Add not so that these tests pass with pipefail enabled.	2013-07-23 13:18:20 +00:00
ldrd-armv4.txt
lit.local.cfg	[tests] Cleanup initialization of test suffixes.	2013-08-16 00:37:11 +00:00
marked-up-thumb.txt
memory-arm-instructions.txt
neon-tests.txt
neon-v8.txt	[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.	2013-07-19 16:34:16 +00:00
neon.txt
neont2.txt	ARM: Enforce decoding rules for VLDn instructions	2013-06-11 08:14:14 +00:00
neont-VLD-reencoding.txt
neont-VST-reencoding.txt
thumb1.txt	This corrects the implementation of Thumb ADR instruction. There are three issues:	2013-07-03 09:21:44 +00:00
thumb2.txt	Added the B9.3.19 SUBS PC, LR, #imm (Thumb2) system instruction.	2013-07-31 21:05:30 +00:00
thumb-MSR-MClass.txt
thumb-neon-v8.txt	[ARMv8] Implement the NEON instructions VRINT{N, X, A, Z, M, P}.	2013-07-19 16:34:16 +00:00
thumb-printf.txt
thumb-tests.txt	This fixes the Thumb2 CPS assembly syntax.	2013-08-09 13:52:32 +00:00
thumb-v8fp.txt	Add Thumb tests for the ARMv8 FP instructions that I recently added.	2013-07-18 10:20:25 +00:00
unpredictable-ADC-arm.txt
unpredictable-ADDREXT3-arm.txt
unpredictable-AExtI-arm.txt
unpredictable-AI1cmp-arm.txt
unpredictable-BFI.txt
unpredictable-LDR-arm.txt
unpredictable-LDRD-arm.txt
unpredictable-LSL-regform.txt
unpredictable-MRRC2-arm.txt
unpredictable-MRS-arm.txt
unpredictable-MUL-arm.txt
unpredictable-RSC-arm.txt
unpredictable-SEL-arm.txt
unpredictable-SHADD16-arm.txt
unpredictable-SSAT-arm.txt
unpredictable-STRBrs-arm.txt
unpredictable-swp-arm.txt
unpredictable-UQADD8-arm.txt
unpredictables-thumb.txt
v8fp.txt	Add MC assembly/disassembly support for VRINT{A, N, P, M} to V8FP.	2013-07-09 11:26:18 +00:00
vfp4.txt