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aa5932cde5
Instead of having a bunch of separate MOV8r0, MOV16r0, ... pseudo-instructions, it's better to use a single MOV32r0 (which will expand to "xorl %reg, %reg") and obtain other sizes with EXTRACT_SUBREG and SUBREG_TO_REG. The encoding is smaller and partial register updates can sometimes be avoided. Until recently, this sequence was a barrier to rematerialization though. That should now be fixed so it's an appropriate time to make the change. llvm-svn: 182928
52 lines
1.9 KiB
LLVM
52 lines
1.9 KiB
LLVM
; RUN: llc < %s -march=x86-64 -relocation-model=static -mtriple=x86_64-unknown-linux-gnu -asm-verbose=0 | FileCheck %s
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; The inner loop should require only one add (and no leas either).
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; rdar://8100380
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; CHECK: BB0_3:
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; CHECK-NEXT: movb $0, flags(%rdx)
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; CHECK-NEXT: addq %rax, %rdx
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; CHECK-NEXT: cmpq $8192, %rdx
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; CHECK-NEXT: jl
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@flags = external global [8192 x i8], align 16 ; <[8192 x i8]*> [#uses=1]
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define void @foo() nounwind {
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entry:
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%tmp = icmp slt i64 2, 8192 ; <i1> [#uses=1]
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br i1 %tmp, label %bb, label %bb21
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bb: ; preds = %entry
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br label %bb7
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bb7: ; preds = %bb, %bb17
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%tmp8 = phi i64 [ %tmp18, %bb17 ], [ 2, %bb ] ; <i64> [#uses=2]
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%tmp9 = icmp slt i64 2, 8192 ; <i1> [#uses=1]
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br i1 %tmp9, label %bb10, label %bb17
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bb10: ; preds = %bb7
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br label %bb11
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bb11: ; preds = %bb10, %bb11
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%tmp12 = phi i64 [ %tmp14, %bb11 ], [ 2, %bb10 ] ; <i64> [#uses=2]
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%tmp13 = getelementptr inbounds [8192 x i8]* @flags, i64 0, i64 %tmp12 ; <i8*> [#uses=1]
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store i8 0, i8* %tmp13, align 1
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%tmp14 = add nsw i64 %tmp12, %tmp8 ; <i64> [#uses=2]
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%tmp15 = icmp slt i64 %tmp14, 8192 ; <i1> [#uses=1]
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br i1 %tmp15, label %bb11, label %bb16
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bb16: ; preds = %bb11
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br label %bb17
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bb17: ; preds = %bb16, %bb7
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%tmp18 = add nsw i64 %tmp8, 1 ; <i64> [#uses=2]
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%tmp19 = icmp slt i64 %tmp18, 8192 ; <i1> [#uses=1]
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br i1 %tmp19, label %bb7, label %bb20
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bb20: ; preds = %bb17
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br label %bb21
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bb21: ; preds = %bb20, %entry
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ret void
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}
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