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llvm-mirror/test/CodeGen/MIR
Alex Lorenz 12e0d37acb MIR Serialization: Serialize defined registers that require 'def' register flag.
The defined registers are already serialized - they are represented by placing
them before the '=' in a machine instruction. However, certain instructions like
INLINEASM can have defined register operands after the '=', so this commit
introduces the 'def' register flag for such operands.

llvm-svn: 245480
2015-08-19 18:55:47 +00:00
..
AArch64 MIR Serialization: Serialize the operand's bit mask target flags. 2015-08-18 22:52:15 +00:00
AMDGPU MIR Serialization: Change MIR syntax - use custom syntax for MBBs. 2015-08-13 23:10:16 +00:00
ARM MIR Serialization: Serialize the '.cfi_same_value' CFI directive. 2015-08-14 21:55:58 +00:00
Generic MIR Serialization: Change MIR syntax - use custom syntax for MBBs. 2015-08-13 23:10:16 +00:00
Mips MIR Serialization: Serialize the external symbol call entry pseudo source 2015-08-14 21:14:50 +00:00
NVPTX MIR Serialization: Change MIR syntax - use custom syntax for MBBs. 2015-08-13 23:10:16 +00:00
X86 MIR Serialization: Serialize defined registers that require 'def' register flag. 2015-08-19 18:55:47 +00:00
lit.local.cfg Resubmit r237954 (MIR Serialization: print and parse LLVM IR using MIR format). 2015-05-27 18:02:19 +00:00