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ca0f4dc4f0
This commit starts with a "git mv ARM64 AArch64" and continues out from there, renaming the C++ classes, intrinsics, and other target-local objects for consistency. "ARM64" test directories are also moved, and tests that began their life in ARM64 use an arm64 triple, those from AArch64 use an aarch64 triple. Both should be equivalent though. This finishes the AArch64 merge, and everyone should feel free to continue committing as normal now. llvm-svn: 209577
23 lines
1.0 KiB
LLVM
23 lines
1.0 KiB
LLVM
; RUN: llc < %s -march=arm64
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; This test case tests an infinite loop bug in DAG combiner.
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; It just tries to do the following replacing endlessly:
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; (1) Replacing.3 0x2c509f0: v4i32 = any_extend 0x2c4cd08 [ORD=4]
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; With: 0x2c4d128: v4i32 = sign_extend 0x2c4cd08 [ORD=4]
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;
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; (2) Replacing.2 0x2c4d128: v4i32 = sign_extend 0x2c4cd08 [ORD=4]
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; With: 0x2c509f0: v4i32 = any_extend 0x2c4cd08 [ORD=4]
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; As we think the (2) optimization from SIGN_EXTEND to ANY_EXTEND is
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; an optimization to replace unused bits with undefined bits, we remove
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; the (1) optimization (It doesn't make sense to replace undefined bits
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; with signed bits).
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define <4 x i32> @infiniteLoop(<4 x i32> %in0, <4 x i16> %in1) {
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entry:
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%cmp.i = icmp sge <4 x i16> %in1, <i16 32767, i16 32767, i16 -1, i16 -32768>
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%sext.i = sext <4 x i1> %cmp.i to <4 x i32>
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%mul.i = mul <4 x i32> %in0, %sext.i
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%sext = shl <4 x i32> %mul.i, <i32 16, i32 16, i32 16, i32 16>
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%vmovl.i.i = ashr <4 x i32> %sext, <i32 16, i32 16, i32 16, i32 16>
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ret <4 x i32> %vmovl.i.i
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} |