mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-10-24 13:33:37 +02:00
aacfef65cf
derived classes. Since global data alignment, layout, and mangling is often based on the DataLayout, move it to the TargetMachine. This ensures that global data is going to be layed out and mangled consistently if the subtarget changes on a per function basis. Prior to this all targets(*) have had subtarget dependent code moved out and onto the TargetMachine. *One target hasn't been migrated as part of this change: R600. The R600 port has, as a subtarget feature, the size of pointers and this affects global data layout. I've currently hacked in a FIXME to enable progress, but the port needs to be updated to either pass the 64-bitness to the TargetMachine, or fix the DataLayout to avoid subtarget dependent features. llvm-svn: 227113
84 lines
2.8 KiB
C++
84 lines
2.8 KiB
C++
//===-- SparcSubtarget.cpp - SPARC Subtarget Information ------------------===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file implements the SPARC specific subclass of TargetSubtargetInfo.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#include "SparcSubtarget.h"
|
|
#include "Sparc.h"
|
|
#include "llvm/Support/MathExtras.h"
|
|
#include "llvm/Support/TargetRegistry.h"
|
|
|
|
using namespace llvm;
|
|
|
|
#define DEBUG_TYPE "sparc-subtarget"
|
|
|
|
#define GET_SUBTARGETINFO_TARGET_DESC
|
|
#define GET_SUBTARGETINFO_CTOR
|
|
#include "SparcGenSubtargetInfo.inc"
|
|
|
|
void SparcSubtarget::anchor() { }
|
|
|
|
SparcSubtarget &SparcSubtarget::initializeSubtargetDependencies(StringRef CPU,
|
|
StringRef FS) {
|
|
IsV9 = false;
|
|
V8DeprecatedInsts = false;
|
|
IsVIS = false;
|
|
HasHardQuad = false;
|
|
UsePopc = false;
|
|
|
|
// Determine default and user specified characteristics
|
|
std::string CPUName = CPU;
|
|
if (CPUName.empty())
|
|
CPUName = (Is64Bit) ? "v9" : "v8";
|
|
|
|
// Parse features string.
|
|
ParseSubtargetFeatures(CPUName, FS);
|
|
|
|
// Popc is a v9-only instruction.
|
|
if (!IsV9)
|
|
UsePopc = false;
|
|
|
|
return *this;
|
|
}
|
|
|
|
SparcSubtarget::SparcSubtarget(const std::string &TT, const std::string &CPU,
|
|
const std::string &FS, TargetMachine &TM,
|
|
bool is64Bit)
|
|
: SparcGenSubtargetInfo(TT, CPU, FS), Is64Bit(is64Bit),
|
|
InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM),
|
|
TSInfo(*TM.getDataLayout()), FrameLowering(*this) {}
|
|
|
|
int SparcSubtarget::getAdjustedFrameSize(int frameSize) const {
|
|
|
|
if (is64Bit()) {
|
|
// All 64-bit stack frames must be 16-byte aligned, and must reserve space
|
|
// for spilling the 16 window registers at %sp+BIAS..%sp+BIAS+128.
|
|
frameSize += 128;
|
|
// Frames with calls must also reserve space for 6 outgoing arguments
|
|
// whether they are used or not. LowerCall_64 takes care of that.
|
|
assert(frameSize % 16 == 0 && "Stack size not 16-byte aligned");
|
|
} else {
|
|
// Emit the correct save instruction based on the number of bytes in
|
|
// the frame. Minimum stack frame size according to V8 ABI is:
|
|
// 16 words for register window spill
|
|
// 1 word for address of returned aggregate-value
|
|
// + 6 words for passing parameters on the stack
|
|
// ----------
|
|
// 23 words * 4 bytes per word = 92 bytes
|
|
frameSize += 92;
|
|
|
|
// Round up to next doubleword boundary -- a double-word boundary
|
|
// is required by the ABI.
|
|
frameSize = RoundUpToAlignment(frameSize, 8);
|
|
}
|
|
return frameSize;
|
|
}
|