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llvm-mirror/test/CodeGen/Hexagon/cfgopt-fall-through.ll
Sumanth Gundapaneni 262321d1ff [Hexagon] New HVX target features.
This patch lets the llvm tools handle the new HVX target features that
are added by frontend (clang). The target-features are of the form
"hvx-length64b" for 64 Byte HVX mode, "hvx-length128b" for 128 Byte mode HVX.
"hvx-double" is an alias to "hvx-length128b" and is soon will be deprecated.
The hvx version target feature is upgated form "+hvx" to "+hvxv{version_number}.
Eg: "+hvxv62"

For the correct HVX code generation, the user must use the following
target features.
For 64B mode: "+hvxv62" "+hvx-length64b"
For 128B mode: "+hvxv62" "+hvx-length128b"

Clang picks a default length if none is specified. If for some reason,
no hvx-length is specified to llvm, the compilation will bail out.
There is a corresponding clang patch.

Differential Revision: https://reviews.llvm.org/D38851

llvm-svn: 316101
2017-10-18 18:07:07 +00:00

72 lines
2.0 KiB
LLVM

; RUN: llc -march=hexagon -verify-machineinstrs < %s | FileCheck %s
; REQUIRES: asserts
; Check for some sane output. This test used to crash.
; CHECK: jumpr r31
define i32 @fred(i32 %a0, i8 zeroext %a1) local_unnamed_addr #0 {
b2:
br i1 undef, label %b4, label %b3
b3: ; preds = %b2
unreachable
b4: ; preds = %b2
br i1 undef, label %b19, label %b5
b5: ; preds = %b4
br i1 undef, label %b6, label %b12
b6: ; preds = %b5
switch i8 %a1, label %b17 [
i8 2, label %b7
i8 5, label %b7
i8 1, label %b7
i8 3, label %b8
]
b7: ; preds = %b6, %b6, %b6
unreachable
b8: ; preds = %b6
br i1 undef, label %b11, label %b9
b9: ; preds = %b8
%v10 = or i32 undef, 0
br label %b15
b11: ; preds = %b8
unreachable
b12: ; preds = %b5
switch i8 %a1, label %b17 [
i8 5, label %b13
i8 1, label %b13
i8 2, label %b14
i8 3, label %b15
]
b13: ; preds = %b12, %b12
store i32 %a0, i32* undef, align 4
br label %b17
b14: ; preds = %b12
store i16 undef, i16* undef, align 4
br label %b17
b15: ; preds = %b12, %b9
%v16 = phi i32 [ 0, %b12 ], [ %v10, %b9 ]
store i32 undef, i32* undef, align 4
br label %b17
b17: ; preds = %b15, %b14, %b13, %b12, %b6
%v18 = phi i32 [ 0, %b13 ], [ 0, %b12 ], [ %v16, %b15 ], [ 0, %b14 ], [ 0, %b6 ]
ret i32 %v18
b19: ; preds = %b4
unreachable
}
attributes #0 = { nounwind "target-cpu"="hexagonv55" "target-features"="-hvx,-long-calls" }