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https://github.com/RPCS3/llvm-mirror.git
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6a475e691d
This commit includes a mention of the landingpad instruction, but it's not changing the behavior around it. I think the current behavior is correct, though. Bill, can you double-check that? llvm-svn: 137691
88 lines
1.6 KiB
LLVM
88 lines
1.6 KiB
LLVM
; RUN: opt < %s -simplifycfg -S | FileCheck %s
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; PR2967
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target datalayout =
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"e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32"
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target triple = "i386-pc-linux-gnu"
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define void @test1(i32 %x) nounwind {
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entry:
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%0 = icmp eq i32 %x, 0 ; <i1> [#uses=1]
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br i1 %0, label %bb, label %return
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bb: ; preds = %entry
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%1 = load volatile i32* null
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unreachable
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br label %return
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return: ; preds = %entry
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ret void
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; CHECK: @test1
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; CHECK: load volatile
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}
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; rdar://7958343
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define void @test2() nounwind {
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entry:
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store i32 4,i32* null
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ret void
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; CHECK: @test2
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; CHECK: call void @llvm.trap
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; CHECK: unreachable
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}
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; PR7369
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define void @test3() nounwind {
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entry:
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store volatile i32 4, i32* null
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ret void
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; CHECK: @test3
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; CHECK: store volatile i32 4, i32* null
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; CHECK: ret
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}
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; Check store before unreachable.
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define void @test4(i1 %C, i32* %P) {
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; CHECK: @test4
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; CHECK: entry:
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; CHECK-NEXT: br i1 %C
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entry:
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br i1 %C, label %T, label %F
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T:
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store volatile i32 0, i32* %P
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unreachable
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F:
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ret void
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}
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; Check cmpxchg before unreachable.
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define void @test5(i1 %C, i32* %P) {
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; CHECK: @test5
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; CHECK: entry:
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; CHECK-NEXT: br i1 %C
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entry:
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br i1 %C, label %T, label %F
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T:
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cmpxchg volatile i32* %P, i32 0, i32 1 seq_cst
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unreachable
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F:
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ret void
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}
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; Check atomicrmw before unreachable.
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define void @test6(i1 %C, i32* %P) {
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; CHECK: @test6
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; CHECK: entry:
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; CHECK-NEXT: br i1 %C
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entry:
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br i1 %C, label %T, label %F
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T:
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atomicrmw volatile xchg i32* %P, i32 0 seq_cst
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unreachable
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F:
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ret void
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}
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