Daniel Sanders 14c4e7277a [mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6 ...

Summary:
The error message for the invalid.s cases isn't very helpful. It happens because
there is an instruction with a wider immediate that would have matched if the
NotMips32r6 predicate were true. I have some WIP to improve the message but it
affects most error messages for removed/re-encoded instructions on
MIPS32r6/MIPS64r6 and should therefore be a separate commit.

Depens on D4115

Reviewers: zoran.jovanovic, jkolek, vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D4117

llvm-svn: 211012

2014-06-16 10:00:45 +00:00

..

invalid-mips3-wrong-error.s

[mips][mips64r6] daddi is not available on MIPS64r6

2014-06-13 12:49:06 +00:00

invalid-mips3.s

[mips][mips64r6] daddi is not available on MIPS64r6

2014-06-13 12:49:06 +00:00

invalid-mips4-wrong-error.s

[mips] Marked up instructions added in MIPS-IV and tested that IAS for -mcpu=mips[123] does not accept them

2014-05-09 14:06:17 +00:00

invalid-mips4.s

[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

2014-06-12 15:00:17 +00:00

invalid-mips5-wrong-error.s

[mips] Marked up instructions added in MIPS-V and tested that IAS for -mcpu=mips[1234] does not accept them

2014-05-12 12:52:44 +00:00

invalid-mips5.s

[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

2014-06-12 15:00:17 +00:00

invalid-mips32.s

[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

2014-06-12 15:00:17 +00:00

invalid-mips32r2-xfail.s

[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them

2014-05-13 11:45:36 +00:00

invalid-mips32r2.s

[mips][mips64r6] bc1[tf] are not available on MIPS32r6/MIPS64r6

2014-06-12 15:00:17 +00:00

valid.s

[mips][mips64r6] [ls][wd]c2 were re-encoded with 11-bit signed immediates rather than 16-bit in MIPS32r6/MIPS64r6

2014-06-16 10:00:45 +00:00