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34c31df32a
Remove the old IR ordering mechanism and switch to new one. Fix unit test failures. llvm-svn: 182704
101 lines
3.7 KiB
LLVM
101 lines
3.7 KiB
LLVM
; RUN: llc < %s -mtriple=thumbv7-apple-ios -mcpu=cortex-a9 | FileCheck %s
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; Test that ldmia_ret preserves implicit operands for return values.
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;
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; This CFG is reduced from a benchmark miscompile. With current
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; if-conversion heuristics, one of the return paths is if-converted
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; into sw.bb18 resulting in an ldmia_ret in the middle of the
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; block. The postra scheduler needs to know that the return implicitly
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; uses the return register, otherwise its antidep breaker scavenges
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; the register in order to hoist the constant load required to test
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; the switch.
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declare i32 @getint()
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declare i1 @getbool()
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declare void @foo(i32)
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declare i32 @bar(i32)
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define i32 @test(i32 %in1, i32 %in2) nounwind {
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entry:
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%call = tail call zeroext i1 @getbool() nounwind
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br i1 %call, label %sw.bb18, label %sw.bb2
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sw.bb2: ; preds = %entry
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%cmp = tail call zeroext i1 @getbool() nounwind
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br i1 %cmp, label %sw.epilog58, label %land.lhs.true
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land.lhs.true: ; preds = %sw.bb2
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%cmp13 = tail call zeroext i1 @getbool() nounwind
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br i1 %cmp13, label %if.then, label %sw.epilog58
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if.then: ; preds = %land.lhs.true
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tail call void @foo(i32 %in1) nounwind
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br label %sw.epilog58
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; load the return value
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; CHECK: movs [[RRET:r.]], #2
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; hoist the switch constant without clobbering RRET
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; CHECK: movw
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; CHECK-NOT: [[RRET]]
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; CHECK: , #63707
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; CHECK-NOT: [[RRET]]
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; CHECK: tst
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; If-convert the return
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; CHECK: it ne
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; Fold the CSR+return into a pop
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; CHECK: pop {r4, r5, r6, r7, pc}
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sw.bb18:
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%call20 = tail call i32 @bar(i32 %in2) nounwind
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switch i32 %call20, label %sw.default56 [
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i32 168, label %sw.bb21
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i32 165, label %sw.bb21
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i32 261, label %sw.epilog58
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i32 188, label %sw.epilog58
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i32 187, label %sw.epilog58
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i32 186, label %sw.epilog58
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i32 185, label %sw.epilog58
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i32 184, label %sw.epilog58
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i32 175, label %sw.epilog58
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i32 174, label %sw.epilog58
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i32 173, label %sw.epilog58
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i32 172, label %sw.epilog58
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i32 171, label %sw.epilog58
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i32 167, label %sw.epilog58
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i32 166, label %sw.epilog58
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i32 164, label %sw.epilog58
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i32 163, label %sw.epilog58
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i32 161, label %sw.epilog58
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i32 160, label %sw.epilog58
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i32 -1, label %sw.bb33
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]
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sw.bb21: ; preds = %sw.bb18, %sw.bb18
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tail call void @foo(i32 %in2) nounwind
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%call28 = tail call i32 @getint() nounwind
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%tobool = icmp eq i32 %call28, 0
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br i1 %tobool, label %if.then29, label %sw.epilog58
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if.then29: ; preds = %sw.bb21
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tail call void @foo(i32 %in2) nounwind
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br label %sw.epilog58
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sw.bb33: ; preds = %sw.bb18
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%cmp42 = tail call zeroext i1 @getbool() nounwind
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br i1 %cmp42, label %sw.default56, label %land.lhs.true44
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land.lhs.true44: ; preds = %sw.bb33
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%call50 = tail call i32 @getint() nounwind
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%cmp51 = icmp slt i32 %call50, 0
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br i1 %cmp51, label %if.then53, label %sw.default56
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if.then53: ; preds = %land.lhs.true44
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tail call void @foo(i32 %in2) nounwind
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br label %sw.default56
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sw.default56: ; preds = %sw.bb33, %land.lhs.true44, %if.then53, %sw.bb18
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br label %sw.epilog58
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sw.epilog58:
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%retval.0 = phi i32 [ 4, %sw.default56 ], [ 2, %sw.bb21 ], [ 2, %if.then29 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb18 ], [ 2, %sw.bb2 ], [ 2, %land.lhs.true ], [ 2, %if.then ]
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ret i32 %retval.0
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}
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