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61f1a9f5d2
Since we have ARM unwind directive parser and assembler, we can check the correctness in two stages: 1. From LLVM assembly (.ll) to ARM assembly (.s) 2. From ARM assembly (.s) to ELF object file (.o) We already have several "*.s to *.o" test cases. This CL adds some "*.ll to *.s" test cases and removes the redundant "*.ll to *.o" test cases. New test cases to check "*.ll to *.s" code generator: - ehabi.ll: Check the correctness of the generated unwind directives. - section-name.ll: Check the section name of functions. Removed test cases: - ehabi-mc-cantunwind.ll (Covered by ehabi-cantunwind.ll, and eh-directive-cantunwind.s) - ehabi-mc-compact-pr0.ll (Covered by ehabi.ll, eh-compact-pr0.s, eh-directive-save.s, and eh-directive-setfp.s) - ehabi-mc-compact-pr1.ll (Covered by ehabi.ll, eh-compact-pr1.s, eh-directive-save.s, and eh-directive-setfp.s) - ehabi-mc.ll (Covered by ehabi.ll, and eh-directive-integrated-test.s) - ehabi-mc-section-group.ll (Covered by section-name.ll, and eh-directive-section-comdat.s) - ehabi-mc-section.ll (Covered by section-name.ll, and eh-directive-section.s) - ehabi-mc-sh_link.ll (Covered by eh-directive-text-section.s, and eh-directive-section.s) llvm-svn: 183628
299 lines
8.9 KiB
LLVM
299 lines
8.9 KiB
LLVM
; ARM EHABI integrated test
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; This test case checks whether the ARM unwind directives are properly
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; generated or not.
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; The purpose of the test:
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; (1) .fnstart and .fnend directives should wrap the function.
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; (2) .setfp directive should be available if frame pointer is not eliminated.
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; (3) .save directive should come with push instruction.
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; (4) .vsave directive should come with vpush instruction.
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; (5) .pad directive should come with stack pointer adjustment.
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; (6) .cantunwind directive should be available if the function is marked with
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; nounwind function attribute.
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; We have to check several cases:
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; (1) arm with -disable-fp-elim
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; (2) arm without -disable-fp-elim
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; (3) armv7 with -disable-fp-elim
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; (4) armv7 without -disable-fp-elim
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; RUN: llc -mtriple arm-unknown-linux-gnueabi \
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; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
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; RUN: -disable-fp-elim -filetype=asm -o - %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-FP
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; RUN: llc -mtriple arm-unknown-linux-gnueabi \
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; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
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; RUN: -filetype=asm -o - %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-FP-ELIM
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; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
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; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
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; RUN: -disable-fp-elim -filetype=asm -o - %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP
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; RUN: llc -mtriple armv7-unknown-linux-gnueabi \
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; RUN: -arm-enable-ehabi -arm-enable-ehabi-descriptors \
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; RUN: -filetype=asm -o - %s \
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; RUN: | FileCheck %s --check-prefix=CHECK-V7-FP-ELIM
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;-------------------------------------------------------------------------------
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; Test 1
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;-------------------------------------------------------------------------------
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; This is the LLVM assembly generated from following C++ code:
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;
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; extern void print(int, int, int, int, int);
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; extern void print(double, double, double, double, double);
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;
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; void test(int a, int b, int c, int d, int e,
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; double m, double n, double p, double q, double r) {
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; try {
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; print(a, b, c, d, e);
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; } catch (...) {
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; print(m, n, p, q, r);
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; }
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; }
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declare void @_Z5printiiiii(i32, i32, i32, i32, i32)
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declare void @_Z5printddddd(double, double, double, double, double)
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define void @_Z4testiiiiiddddd(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e,
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double %m, double %n, double %p,
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double %q, double %r) {
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entry:
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invoke void @_Z5printiiiii(i32 %a, i32 %b, i32 %c, i32 %d, i32 %e)
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to label %try.cont unwind label %lpad
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lpad:
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%0 = landingpad { i8*, i32 }
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personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
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catch i8* null
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%1 = extractvalue { i8*, i32 } %0, 0
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%2 = tail call i8* @__cxa_begin_catch(i8* %1)
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invoke void @_Z5printddddd(double %m, double %n, double %p,
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double %q, double %r)
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to label %invoke.cont2 unwind label %lpad1
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invoke.cont2:
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tail call void @__cxa_end_catch()
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br label %try.cont
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try.cont:
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ret void
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lpad1:
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%3 = landingpad { i8*, i32 }
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personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
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cleanup
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invoke void @__cxa_end_catch()
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to label %eh.resume unwind label %terminate.lpad
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eh.resume:
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resume { i8*, i32 } %3
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terminate.lpad:
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%4 = landingpad { i8*, i32 }
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personality i8* bitcast (i32 (...)* @__gxx_personality_v0 to i8*)
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catch i8* null
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%5 = extractvalue { i8*, i32 } %4, 0
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tail call void @__clang_call_terminate(i8* %5)
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unreachable
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}
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declare void @__clang_call_terminate(i8*)
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declare i32 @__gxx_personality_v0(...)
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declare i8* @__cxa_begin_catch(i8*)
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declare void @__cxa_end_catch()
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declare void @_ZSt9terminatev()
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; CHECK-FP: _Z4testiiiiiddddd:
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; CHECK-FP: .fnstart
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; CHECK-FP: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-FP: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-FP: .setfp r11, sp, #28
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; CHECK-FP: add r11, sp, #28
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; CHECK-FP: .pad #28
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; CHECK-FP: sub sp, sp, #28
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; CHECK-FP: .personality __gxx_personality_v0
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; CHECK-FP: .handlerdata
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; CHECK-FP: .fnend
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; CHECK-FP-ELIM: _Z4testiiiiiddddd:
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; CHECK-FP-ELIM: .fnstart
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; CHECK-FP-ELIM: .save {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-FP-ELIM: push {r4, r5, r6, r7, r8, r9, r10, r11, lr}
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; CHECK-FP-ELIM: .pad #28
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; CHECK-FP-ELIM: sub sp, sp, #28
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; CHECK-FP-ELIM: .personality __gxx_personality_v0
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; CHECK-FP-ELIM: .handlerdata
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; CHECK-FP-ELIM: .fnend
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; CHECK-V7-FP: _Z4testiiiiiddddd:
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; CHECK-V7-FP: .fnstart
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; CHECK-V7-FP: .save {r4, r11, lr}
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; CHECK-V7-FP: push {r4, r11, lr}
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; CHECK-V7-FP: .setfp r11, sp, #4
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; CHECK-V7-FP: add r11, sp, #4
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; CHECK-V7-FP: .vsave {d8, d9, d10, d11, d12}
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; CHECK-V7-FP: vpush {d8, d9, d10, d11, d12}
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; CHECK-V7-FP: .pad #28
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; CHECK-V7-FP: sub sp, sp, #28
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; CHECK-V7-FP: .personality __gxx_personality_v0
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; CHECK-V7-FP: .handlerdata
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; CHECK-V7-FP: .fnend
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; CHECK-V7-FP-ELIM: _Z4testiiiiiddddd:
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; CHECK-V7-FP-ELIM: .fnstart
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; CHECK-V7-FP-ELIM: .save {r4, lr}
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; CHECK-V7-FP-ELIM: push {r4, lr}
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; CHECK-V7-FP-ELIM: .vsave {d8, d9, d10, d11, d12}
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; CHECK-V7-FP-ELIM: vpush {d8, d9, d10, d11, d12}
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; CHECK-V7-FP-ELIM: .pad #24
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; CHECK-V7-FP-ELIM: sub sp, sp, #24
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; CHECK-V7-FP-ELIM: .personality __gxx_personality_v0
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; CHECK-V7-FP-ELIM: .handlerdata
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; CHECK-V7-FP-ELIM: .fnend
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;-------------------------------------------------------------------------------
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; Test 2
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;-------------------------------------------------------------------------------
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declare void @throw_exception_2()
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define void @test2() {
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entry:
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tail call void @throw_exception_2()
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ret void
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}
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; CHECK-FP: test2:
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; CHECK-FP: .fnstart
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; CHECK-FP: .save {r11, lr}
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; CHECK-FP: push {r11, lr}
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; CHECK-FP: .setfp r11, sp
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; CHECK-FP: mov r11, sp
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; CHECK-FP: pop {r11, lr}
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; CHECK-FP: mov pc, lr
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; CHECK-FP: .fnend
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; CHECK-FP-ELIM: test2:
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; CHECK-FP-ELIM: .fnstart
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; CHECK-FP-ELIM: .save {r11, lr}
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; CHECK-FP-ELIM: push {r11, lr}
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; CHECK-FP-ELIM: pop {r11, lr}
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; CHECK-FP-ELIM: mov pc, lr
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; CHECK-FP-ELIM: .fnend
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; CHECK-V7-FP: test2:
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; CHECK-V7-FP: .fnstart
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; CHECK-V7-FP: .save {r11, lr}
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; CHECK-V7-FP: push {r11, lr}
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; CHECK-V7-FP: .setfp r11, sp
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; CHECK-V7-FP: mov r11, sp
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; CHECK-V7-FP: pop {r11, pc}
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; CHECK-V7-FP: .fnend
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; CHECK-V7-FP-ELIM: test2:
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; CHECK-V7-FP-ELIM: .fnstart
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; CHECK-V7-FP-ELIM: .save {r11, lr}
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; CHECK-V7-FP-ELIM: push {r11, lr}
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; CHECK-V7-FP-ELIM: pop {r11, pc}
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; CHECK-V7-FP-ELIM: .fnend
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;-------------------------------------------------------------------------------
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; Test 3
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;-------------------------------------------------------------------------------
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declare void @throw_exception_3(i32)
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define i32 @test3(i32 %a, i32 %b, i32 %c, i32 %d,
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i32 %e, i32 %f, i32 %g, i32 %h) {
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entry:
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%add = add nsw i32 %b, %a
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%add1 = add nsw i32 %add, %c
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%add2 = add nsw i32 %add1, %d
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tail call void @throw_exception_3(i32 %add2)
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%add3 = add nsw i32 %f, %e
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%add4 = add nsw i32 %add3, %g
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%add5 = add nsw i32 %add4, %h
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tail call void @throw_exception_3(i32 %add5)
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%add6 = add nsw i32 %add5, %add2
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ret i32 %add6
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}
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; CHECK-FP: test3:
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; CHECK-FP: .fnstart
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; CHECK-FP: .save {r4, r5, r11, lr}
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; CHECK-FP: push {r4, r5, r11, lr}
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; CHECK-FP: .setfp r11, sp, #8
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; CHECK-FP: add r11, sp, #8
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; CHECK-FP: pop {r4, r5, r11, lr}
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; CHECK-FP: mov pc, lr
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; CHECK-FP: .fnend
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; CHECK-FP-ELIM: test3:
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; CHECK-FP-ELIM: .fnstart
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; CHECK-FP-ELIM: .save {r4, r5, r11, lr}
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; CHECK-FP-ELIM: push {r4, r5, r11, lr}
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; CHECK-FP-ELIM: pop {r4, r5, r11, lr}
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; CHECK-FP-ELIM: mov pc, lr
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; CHECK-FP-ELIM: .fnend
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; CHECK-V7-FP: test3:
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; CHECK-V7-FP: .fnstart
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; CHECK-V7-FP: .save {r4, r5, r11, lr}
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; CHECK-V7-FP: push {r4, r5, r11, lr}
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; CHECK-V7-FP: .setfp r11, sp, #8
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; CHECK-V7-FP: add r11, sp, #8
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; CHECK-V7-FP: pop {r4, r5, r11, pc}
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; CHECK-V7-FP: .fnend
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; CHECK-V7-FP-ELIM: test3:
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; CHECK-V7-FP-ELIM: .fnstart
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; CHECK-V7-FP-ELIM: .save {r4, r5, r11, lr}
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; CHECK-V7-FP-ELIM: push {r4, r5, r11, lr}
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; CHECK-V7-FP-ELIM: pop {r4, r5, r11, pc}
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; CHECK-V7-FP-ELIM: .fnend
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;-------------------------------------------------------------------------------
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; Test 4
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;-------------------------------------------------------------------------------
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define void @test4() nounwind {
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entry:
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ret void
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}
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; CHECK-FP: test4:
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; CHECK-FP: .fnstart
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; CHECK-FP: mov pc, lr
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; CHECK-FP: .cantunwind
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; CHECK-FP: .fnend
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; CHECK-FP-ELIM: test4:
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; CHECK-FP-ELIM: .fnstart
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; CHECK-FP-ELIM: mov pc, lr
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; CHECK-FP-ELIM: .cantunwind
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; CHECK-FP-ELIM: .fnend
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; CHECK-V7-FP: test4:
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; CHECK-V7-FP: .fnstart
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; CHECK-V7-FP: bx lr
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; CHECK-V7-FP: .cantunwind
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; CHECK-V7-FP: .fnend
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; CHECK-V7-FP-ELIM: test4:
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; CHECK-V7-FP-ELIM: .fnstart
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; CHECK-V7-FP-ELIM: bx lr
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; CHECK-V7-FP-ELIM: .cantunwind
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; CHECK-V7-FP-ELIM: .fnend
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