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1431b3c2f5
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. llvm-svn: 181204
131 lines
3.0 KiB
LLVM
131 lines
3.0 KiB
LLVM
; Test 16-bit GPR stores.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Test an i16 store, which should get converted into an i32 truncation.
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define void @f1(i16 *%dst, i16 %val) {
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; CHECK: f1:
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; CHECK: sth %r3, 0(%r2)
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; CHECK: br %r14
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store i16 %val, i16 *%dst
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ret void
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}
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; Test an i32 truncating store.
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define void @f2(i16 *%dst, i32 %val) {
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; CHECK: f2:
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; CHECK: sth %r3, 0(%r2)
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; CHECK: br %r14
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%trunc = trunc i32 %val to i16
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store i16 %trunc, i16 *%dst
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ret void
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}
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; Test an i64 truncating store.
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define void @f3(i16 *%dst, i64 %val) {
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; CHECK: f3:
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; CHECK: sth %r3, 0(%r2)
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; CHECK: br %r14
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%trunc = trunc i64 %val to i16
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store i16 %trunc, i16 *%dst
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ret void
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}
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; Check the high end of the STH range.
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define void @f4(i16 *%dst, i16 %val) {
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; CHECK: f4:
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; CHECK: sth %r3, 4094(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 2047
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the next halfword up, which should use STHY instead of STH.
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define void @f5(i16 *%dst, i16 %val) {
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; CHECK: f5:
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; CHECK: sthy %r3, 4096(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 2048
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the high end of the aligned STHY range.
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define void @f6(i16 *%dst, i16 %val) {
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; CHECK: f6:
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; CHECK: sthy %r3, 524286(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 262143
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the next halfword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f7(i16 *%dst, i16 %val) {
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; CHECK: f7:
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; CHECK: agfi %r2, 524288
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; CHECK: sth %r3, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 262144
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the high end of the negative aligned STHY range.
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define void @f8(i16 *%dst, i16 %val) {
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; CHECK: f8:
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; CHECK: sthy %r3, -2(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 -1
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the low end of the STHY range.
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define void @f9(i16 *%dst, i16 %val) {
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; CHECK: f9:
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; CHECK: sthy %r3, -524288(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 -262144
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check the next halfword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define void @f10(i16 *%dst, i16 %val) {
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; CHECK: f10:
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; CHECK: agfi %r2, -524290
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; CHECK: sth %r3, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr i16 *%dst, i64 -262145
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check that STH allows an index.
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define void @f11(i64 %dst, i64 %index, i16 %val) {
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; CHECK: f11:
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; CHECK: sth %r4, 4094({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %dst, %index
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%add2 = add i64 %add1, 4094
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%ptr = inttoptr i64 %add2 to i16 *
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store i16 %val, i16 *%ptr
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ret void
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}
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; Check that STHY allows an index.
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define void @f12(i64 %dst, i64 %index, i16 %val) {
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; CHECK: f12:
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; CHECK: sthy %r4, 4096({{%r3,%r2|%r2,%r3}})
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; CHECK: br %r14
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%add1 = add i64 %dst, %index
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%add2 = add i64 %add1, 4096
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%ptr = inttoptr i64 %add2 to i16 *
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store i16 %val, i16 *%ptr
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ret void
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}
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