Matthew Simpson 154abb5d70 [LV] Relax Small Size Reduction Type Requirement ... This patch enables small size reductions in which the source types are smaller than the reduction type (e.g., computing an i16 sum from the values in an i8 array). The previous behavior was to only allow small size reductions if the source types and reduction type were the same. The change accounts for the fact that the existing sign- and zero-extend instructions in these cases should still be included in the cost model. Differential Revision: http://reviews.llvm.org/D12770 llvm-svn: 247337		2015-09-10 21:12:57 +00:00
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aarch64-unroll.ll	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
arbitrary-induction-step.ll	[AArch64] Turn on by default interleaved access vectorization	2015-09-01 11:26:46 +00:00
arm64-unroll.ll	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
gather-cost.ll	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00
interleaved_cost.ll	[AArch64] Turn on by default interleaved access vectorization	2015-09-01 11:26:46 +00:00
lit.local.cfg	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
reduction-small-size.ll	[LV] Relax Small Size Reduction Type Requirement	2015-09-10 21:12:57 +00:00
sdiv-pow2.ll	[opaque pointer type] Add textual IR support for explicit type parameter to load instruction	2015-02-27 21:17:42 +00:00