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04c82d35b9
There is an assert at line 558 in ScheduleDAGInstrs::buildSchedGraph(AliasAnalysis *AA).
This assert needs to addressed for post RA scheduler. Until that assert is addressed,
any passes that uses post ra scheduler will fail. So, I am temporarily disabling the
hexagon tests until that fix is in.
The assert is as follows:
assert(!MI->isTerminator() && !MI->isLabel() &&
"Cannot schedule terminators or labels!");
llvm-svn: 154617
18 lines
427 B
LLVM
18 lines
427 B
LLVM
; RUN: true
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; DISABLED: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; CHECK: r[[T0:[0-9]+]] = CONST32(#s2)
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; CHECK: r[[T1:[0-9]+]] = memw(r[[T0]] + #0)
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; CHECK: memw(r29 + #0) = r[[T1]]
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%struct.large = type { i64, i64 }
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@s2 = common global %struct.large zeroinitializer, align 8
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define void @foo() nounwind {
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entry:
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call void @bar(%struct.large* byval @s2)
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ret void
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}
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declare void @bar(%struct.large* byval)
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