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https://github.com/RPCS3/llvm-mirror.git
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f41154b488
Isel now selects masked move instructions for vselect instead of blendm. But sometimes it beneficial to register allocation to remove the tied register constraint by using blendm instructions. This also picks up cases where the masked move was created due to a masked load intrinsic. Differential Revision: https://reviews.llvm.org/D28454 llvm-svn: 292005
153 lines
5.5 KiB
LLVM
153 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=x86_64-apple-darwin -mcpu=skx | FileCheck %s
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define <64 x i8> @test1(<64 x i8> %x, <64 x i8> %y) nounwind {
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; CHECK-LABEL: test1:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpeqb %zmm1, %zmm0, %k1
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; CHECK-NEXT: vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask = icmp eq <64 x i8> %x, %y
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%max = select <64 x i1> %mask, <64 x i8> %x, <64 x i8> %y
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ret <64 x i8> %max
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}
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define <64 x i8> @test2(<64 x i8> %x, <64 x i8> %y, <64 x i8> %x1) nounwind {
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; CHECK-LABEL: test2:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpgtb %zmm1, %zmm0, %k1
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; CHECK-NEXT: vpblendmb %zmm2, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask = icmp sgt <64 x i8> %x, %y
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%max = select <64 x i1> %mask, <64 x i8> %x1, <64 x i8> %y
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ret <64 x i8> %max
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}
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define <32 x i16> @test3(<32 x i16> %x, <32 x i16> %y, <32 x i16> %x1) nounwind {
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; CHECK-LABEL: test3:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmplew %zmm0, %zmm1, %k1
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; CHECK-NEXT: vpblendmw %zmm2, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask = icmp sge <32 x i16> %x, %y
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%max = select <32 x i1> %mask, <32 x i16> %x1, <32 x i16> %y
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ret <32 x i16> %max
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}
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define <64 x i8> @test4(<64 x i8> %x, <64 x i8> %y, <64 x i8> %x1) nounwind {
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; CHECK-LABEL: test4:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpnleub %zmm1, %zmm0, %k1
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; CHECK-NEXT: vpblendmb %zmm2, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask = icmp ugt <64 x i8> %x, %y
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%max = select <64 x i1> %mask, <64 x i8> %x1, <64 x i8> %y
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ret <64 x i8> %max
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}
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define <32 x i16> @test5(<32 x i16> %x, <32 x i16> %x1, <32 x i16>* %yp) nounwind {
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; CHECK-LABEL: test5:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpeqw (%rdi), %zmm0, %k1
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%y = load <32 x i16>, <32 x i16>* %yp, align 4
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%mask = icmp eq <32 x i16> %x, %y
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %x1
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ret <32 x i16> %max
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}
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define <32 x i16> @test6(<32 x i16> %x, <32 x i16> %x1, <32 x i16>* %y.ptr) nounwind {
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; CHECK-LABEL: test6:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpgtw (%rdi), %zmm0, %k1
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%y = load <32 x i16>, <32 x i16>* %y.ptr, align 4
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%mask = icmp sgt <32 x i16> %x, %y
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %x1
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ret <32 x i16> %max
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}
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define <32 x i16> @test7(<32 x i16> %x, <32 x i16> %x1, <32 x i16>* %y.ptr) nounwind {
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; CHECK-LABEL: test7:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmplew (%rdi), %zmm0, %k1
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%y = load <32 x i16>, <32 x i16>* %y.ptr, align 4
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%mask = icmp sle <32 x i16> %x, %y
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %x1
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ret <32 x i16> %max
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}
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define <32 x i16> @test8(<32 x i16> %x, <32 x i16> %x1, <32 x i16>* %y.ptr) nounwind {
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; CHECK-LABEL: test8:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpleuw (%rdi), %zmm0, %k1
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%y = load <32 x i16>, <32 x i16>* %y.ptr, align 4
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%mask = icmp ule <32 x i16> %x, %y
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %x1
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ret <32 x i16> %max
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}
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define <32 x i16> @test9(<32 x i16> %x, <32 x i16> %y, <32 x i16> %x1, <32 x i16> %y1) nounwind {
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; CHECK-LABEL: test9:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpeqw %zmm1, %zmm0, %k1
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; CHECK-NEXT: vpcmpeqw %zmm3, %zmm2, %k1 {%k1}
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask1 = icmp eq <32 x i16> %x1, %y1
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%mask0 = icmp eq <32 x i16> %x, %y
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%mask = select <32 x i1> %mask0, <32 x i1> %mask1, <32 x i1> zeroinitializer
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %y
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ret <32 x i16> %max
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}
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define <64 x i8> @test10(<64 x i8> %x, <64 x i8> %y, <64 x i8> %x1, <64 x i8> %y1) nounwind {
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; CHECK-LABEL: test10:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpleb %zmm1, %zmm0, %k1
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; CHECK-NEXT: vpcmpleb %zmm2, %zmm3, %k1 {%k1}
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; CHECK-NEXT: vpblendmb %zmm0, %zmm2, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask1 = icmp sge <64 x i8> %x1, %y1
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%mask0 = icmp sle <64 x i8> %x, %y
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%mask = select <64 x i1> %mask0, <64 x i1> %mask1, <64 x i1> zeroinitializer
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%max = select <64 x i1> %mask, <64 x i8> %x, <64 x i8> %x1
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ret <64 x i8> %max
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}
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define <64 x i8> @test11(<64 x i8> %x, <64 x i8>* %y.ptr, <64 x i8> %x1, <64 x i8> %y1) nounwind {
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; CHECK-LABEL: test11:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmpgtb %zmm2, %zmm1, %k1
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; CHECK-NEXT: vpcmpgtb (%rdi), %zmm0, %k1 {%k1}
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; CHECK-NEXT: vpblendmb %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask1 = icmp sgt <64 x i8> %x1, %y1
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%y = load <64 x i8>, <64 x i8>* %y.ptr, align 4
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%mask0 = icmp sgt <64 x i8> %x, %y
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%mask = select <64 x i1> %mask0, <64 x i1> %mask1, <64 x i1> zeroinitializer
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%max = select <64 x i1> %mask, <64 x i8> %x, <64 x i8> %x1
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ret <64 x i8> %max
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}
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define <32 x i16> @test12(<32 x i16> %x, <32 x i16>* %y.ptr, <32 x i16> %x1, <32 x i16> %y1) nounwind {
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; CHECK-LABEL: test12:
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; CHECK: ## BB#0:
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; CHECK-NEXT: vpcmplew %zmm1, %zmm2, %k1
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; CHECK-NEXT: vpcmpleuw (%rdi), %zmm0, %k1 {%k1}
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; CHECK-NEXT: vpblendmw %zmm0, %zmm1, %zmm0 {%k1}
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; CHECK-NEXT: retq
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%mask1 = icmp sge <32 x i16> %x1, %y1
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%y = load <32 x i16>, <32 x i16>* %y.ptr, align 4
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%mask0 = icmp ule <32 x i16> %x, %y
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%mask = select <32 x i1> %mask0, <32 x i1> %mask1, <32 x i1> zeroinitializer
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%max = select <32 x i1> %mask, <32 x i16> %x, <32 x i16> %x1
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ret <32 x i16> %max
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}
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