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9beb691de0
Summary: In PR29973 Sanjay Patel reported an assertion failure when a certain loop was optimized, for a target without SSE2 support. It turned out this was because of the AVG pattern detection introduced in rL253952. Prevent the assertion failure by bailing out early in `detectAVGPattern()`, if the target does not support SSE2. Also add a minimized test case. Reviewers: congh, eli.friedman, spatel Subscribers: emaste, llvm-commits Differential Revision: http://reviews.llvm.org/D20905 llvm-svn: 271548
33 lines
1.2 KiB
LLVM
33 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; REQUIRES: asserts
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=-sse2 | FileCheck %s
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define <16 x i8> @PR27973() {
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; CHECK-LABEL: PR27973:
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; CHECK: # BB#0:
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; CHECK-NEXT: movb $0, 15(%rdi)
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; CHECK-NEXT: movb $0, 14(%rdi)
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; CHECK-NEXT: movb $0, 13(%rdi)
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; CHECK-NEXT: movb $0, 12(%rdi)
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; CHECK-NEXT: movb $0, 11(%rdi)
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; CHECK-NEXT: movb $0, 10(%rdi)
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; CHECK-NEXT: movb $0, 9(%rdi)
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; CHECK-NEXT: movb $0, 8(%rdi)
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; CHECK-NEXT: movb $0, 7(%rdi)
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; CHECK-NEXT: movb $0, 6(%rdi)
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; CHECK-NEXT: movb $0, 5(%rdi)
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; CHECK-NEXT: movb $0, 4(%rdi)
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; CHECK-NEXT: movb $0, 3(%rdi)
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; CHECK-NEXT: movb $0, 2(%rdi)
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; CHECK-NEXT: movb $0, 1(%rdi)
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; CHECK-NEXT: movb $0, (%rdi)
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; CHECK-NEXT: movq %rdi, %rax
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; CHECK-NEXT: retq
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;
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%t0 = zext <16 x i8> zeroinitializer to <16 x i32>
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%t1 = add nuw nsw <16 x i32> %t0, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%t2 = lshr <16 x i32> %t1, <i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1, i32 1>
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%t3 = trunc <16 x i32> %t2 to <16 x i8>
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ret <16 x i8> %t3
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}
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