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1e5b66c0d5
Extend the handling of memory intrinsics to also include non- target-specific intrinsics, in particular masked loads and stores. Invent "isHandledNonTargetIntrinsic" to distinguish between intrin- sics that should be handled natively from intrinsics that can be passed to TTI. Add code that handles masked loads and stores and update the testcase to reflect the results. Differential Revision: https://reviews.llvm.org/D87340
44 lines
2.2 KiB
LLVM
44 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -S -early-cse < %s | FileCheck %s
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define <128 x i8> @f0(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
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; CHECK-LABEL: @f0(
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; CHECK-NEXT: [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
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; CHECK-NEXT: call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> [[A1]], <128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]])
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; CHECK-NEXT: ret <128 x i8> [[A1]]
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;
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%v0 = icmp eq <128 x i8> %a1, %a2
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call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %a1, <128 x i8>* %a0, i32 4, <128 x i1> %v0)
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%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
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ret <128 x i8> %v1
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}
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define <128 x i8> @f1(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
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; CHECK-LABEL: @f1(
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; CHECK-NEXT: [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
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; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
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; CHECK-NEXT: ret <128 x i8> [[V1]]
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;
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%v0 = icmp eq <128 x i8> %a1, %a2
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%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
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call void @llvm.masked.store.v128i8.p0v128i8(<128 x i8> %v1, <128 x i8>* %a0, i32 4, <128 x i1> %v0)
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ret <128 x i8> %v1
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}
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define <128 x i8> @f2(<128 x i8>* %a0, <128 x i8> %a1, <128 x i8> %a2) {
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; CHECK-LABEL: @f2(
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; CHECK-NEXT: [[V0:%.*]] = icmp eq <128 x i8> [[A1:%.*]], [[A2:%.*]]
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; CHECK-NEXT: [[V1:%.*]] = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* [[A0:%.*]], i32 4, <128 x i1> [[V0]], <128 x i8> undef)
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; CHECK-NEXT: [[V3:%.*]] = add <128 x i8> [[V1]], [[V1]]
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; CHECK-NEXT: ret <128 x i8> [[V3]]
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;
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%v0 = icmp eq <128 x i8> %a1, %a2
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%v1 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
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%v2 = call <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>* %a0, i32 4, <128 x i1> %v0, <128 x i8> undef)
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%v3 = add <128 x i8> %v1, %v2
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ret <128 x i8> %v3
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}
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declare <128 x i8> @llvm.masked.load.v128i8.p0v128i8(<128 x i8>*, i32, <128 x i1>, <128 x i8>)
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declare void @llvm.masked.store.v128i8.p0v128i8(<128 x i8>, <128 x i8>*, i32, <128 x i1>)
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