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87 lines
3.1 KiB
TableGen
87 lines
3.1 KiB
TableGen
//==- HexagonInstrFormatsV5.td - Hexagon Instruction Formats --*- tablegen -==//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file describes the Hexagon V5 instruction classes in TableGen format.
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//
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//===----------------------------------------------------------------------===//
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// Duplex Instruction Class Declaration
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//===----------------------------------------------------------------------===//
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class OpcodeDuplex {
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field bits<32> Inst = ?; // Default to an invalid insn.
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bits<4> IClass = 0; // ICLASS
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bits<13> ISubHi = 0; // Low sub-insn
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bits<13> ISubLo = 0; // High sub-insn
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let Inst{31-29} = IClass{3-1};
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let Inst{13} = IClass{0};
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let Inst{15-14} = 0;
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let Inst{28-16} = ISubHi;
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let Inst{12-0} = ISubLo;
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}
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class InstDuplex<bits<4> iClass, list<dag> pattern = [],
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string cstr = "">
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: Instruction, OpcodeDuplex {
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let Namespace = "Hexagon";
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IType Type = TypeDUPLEX; // uses slot 0,1
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let isCodeGenOnly = 1;
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let hasSideEffects = 0;
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dag OutOperandList = (outs);
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dag InOperandList = (ins);
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let IClass = iClass;
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let Constraints = cstr;
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let Itinerary = DUPLEX;
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let Size = 4;
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// SoftFail is a field the disassembler can use to provide a way for
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// instructions to not match without killing the whole decode process. It is
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// mainly used for ARM, but Tablegen expects this field to exist or it fails
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// to build the decode table.
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field bits<32> SoftFail = 0;
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// *** Must match MCTargetDesc/HexagonBaseInfo.h ***
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let TSFlags{6-0} = Type.Value;
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// Predicated instructions.
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bits<1> isPredicated = 0;
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let TSFlags{7} = isPredicated;
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bits<1> isPredicatedFalse = 0;
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let TSFlags{8} = isPredicatedFalse;
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bits<1> isPredicatedNew = 0;
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let TSFlags{9} = isPredicatedNew;
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// New-value insn helper fields.
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bits<1> isNewValue = 0;
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let TSFlags{10} = isNewValue; // New-value consumer insn.
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bits<1> hasNewValue = 0;
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let TSFlags{11} = hasNewValue; // New-value producer insn.
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bits<3> opNewValue = 0;
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let TSFlags{14-12} = opNewValue; // New-value produced operand.
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bits<1> isNVStorable = 0;
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let TSFlags{15} = isNVStorable; // Store that can become new-value store.
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bits<1> isNVStore = 0;
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let TSFlags{16} = isNVStore; // New-value store insn.
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// Immediate extender helper fields.
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bits<1> isExtendable = 0;
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let TSFlags{17} = isExtendable; // Insn may be extended.
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bits<1> isExtended = 0;
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let TSFlags{18} = isExtended; // Insn must be extended.
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bits<3> opExtendable = 0;
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let TSFlags{21-19} = opExtendable; // Which operand may be extended.
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bits<1> isExtentSigned = 0;
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let TSFlags{22} = isExtentSigned; // Signed or unsigned range.
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bits<5> opExtentBits = 0;
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let TSFlags{27-23} = opExtentBits; //Number of bits of range before extending.
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bits<2> opExtentAlign = 0;
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let TSFlags{29-28} = opExtentAlign; // Alignment exponent before extending.
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}
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