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5dd61ef1e9
Hook up the TableGen lowering for simple pseudo instructions for ARM and use it for a subset of the many pseudos the backend has as proof of concept. More conversions to come. llvm-svn: 134705
128 lines
4.1 KiB
C++
128 lines
4.1 KiB
C++
//===-- ARMAsmPrinter.h - Print machine code to an ARM .s file ------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// ARM Assembly printer class.
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//
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//===----------------------------------------------------------------------===//
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#ifndef ARMASMPRINTER_H
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#define ARMASMPRINTER_H
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#include "ARM.h"
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#include "ARMTargetMachine.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/Support/Compiler.h"
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namespace llvm {
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class MCOperand;
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namespace ARM {
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enum DW_ISA {
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DW_ISA_ARM_thumb = 1,
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DW_ISA_ARM_arm = 2
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};
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}
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class LLVM_LIBRARY_VISIBILITY ARMAsmPrinter : public AsmPrinter {
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/// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
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/// make the right decision when printing asm code for different targets.
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const ARMSubtarget *Subtarget;
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/// AFI - Keep a pointer to ARMFunctionInfo for the current
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/// MachineFunction.
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ARMFunctionInfo *AFI;
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/// MCP - Keep a pointer to constantpool entries of the current
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/// MachineFunction.
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const MachineConstantPool *MCP;
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public:
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explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
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: AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) {
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Subtarget = &TM.getSubtarget<ARMSubtarget>();
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}
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virtual const char *getPassName() const {
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return "ARM Assembly Printer";
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}
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void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
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const char *Modifier = 0);
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virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant, const char *ExtraCode,
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raw_ostream &O);
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virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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unsigned AsmVariant,
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const char *ExtraCode, raw_ostream &O);
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void EmitJumpTable(const MachineInstr *MI);
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void EmitJump2Table(const MachineInstr *MI);
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virtual void EmitInstruction(const MachineInstr *MI);
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bool runOnMachineFunction(MachineFunction &F);
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virtual void EmitConstantPool() {} // we emit constant pools customly!
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virtual void EmitFunctionEntryLabel();
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void EmitStartOfAsmFile(Module &M);
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void EmitEndOfAsmFile(Module &M);
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// lowerOperand - Convert a MachineOperand into the equivalent MCOperand.
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bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp);
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private:
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// Helpers for EmitStartOfAsmFile() and EmitEndOfAsmFile()
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void emitAttributes();
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// Helper for ELF .o only
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void emitARMAttributeSection();
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// Generic helper used to emit e.g. ARMv5 mul pseudos
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void EmitPatchedInstruction(const MachineInstr *MI, unsigned TargetOpc);
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void EmitUnwindingInstruction(const MachineInstr *MI);
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// emitPseudoExpansionLowering - tblgen'erated.
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bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
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const MachineInstr *MI);
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public:
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void PrintDebugValueComment(const MachineInstr *MI, raw_ostream &OS);
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MachineLocation getDebugValueLocation(const MachineInstr *MI) const;
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/// EmitDwarfRegOp - Emit dwarf register operation.
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virtual void EmitDwarfRegOp(const MachineLocation &MLoc) const;
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virtual unsigned getISAEncoding() {
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// ARM/Darwin adds ISA to the DWARF info for each function.
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if (!Subtarget->isTargetDarwin())
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return 0;
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return Subtarget->isThumb() ?
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llvm::ARM::DW_ISA_ARM_thumb : llvm::ARM::DW_ISA_ARM_arm;
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}
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MCOperand GetSymbolRef(const MachineOperand &MO, const MCSymbol *Symbol);
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MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
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const MachineBasicBlock *MBB) const;
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MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
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MCSymbol *GetARMSJLJEHLabel(void) const;
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MCSymbol *GetARMGVSymbol(const GlobalValue *GV);
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/// EmitMachineConstantPoolValue - Print a machine constantpool value to
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/// the .s file.
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virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV);
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};
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} // end namespace llvm
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#endif
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