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52a02205d8
to adding them in a determinstic order (bottom up from the root) based on the structure of the graph itself. This updates tests for some random changes, interesting bits: CodeGen/Blackfin/promote-logic.ll no longer crashes. I have no idea why, but that's good right? CodeGen/X86/2009-07-16-LoadFoldingBug.ll also fails, but now compiles to have one fewer constant pool entry, making the expected load that was being folded disappear. Since it is an unreduced mass of gnast, I just removed it. This fixes PR6370 llvm-svn: 97023
47 lines
835 B
LLVM
47 lines
835 B
LLVM
; RUN: llc -march=msp430 < %s | FileCheck %s
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target datalayout = "e-p:16:8:8-i8:8:8-i8:8:8-i32:8:8"
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target triple = "msp430-generic-generic"
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define i8 @mov(i8 %a, i8 %b) nounwind {
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; CHECK: mov:
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; CHECK: mov.b r14, r15
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ret i8 %b
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}
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define i8 @add(i8 %a, i8 %b) nounwind {
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; CHECK: add:
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; CHECK: add.b r12, r15
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%1 = add i8 %a, %b
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ret i8 %1
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}
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define i8 @and(i8 %a, i8 %b) nounwind {
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; CHECK: and:
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; CHECK: and.w r14, r15
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%1 = and i8 %a, %b
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ret i8 %1
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}
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define i8 @bis(i8 %a, i8 %b) nounwind {
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; CHECK: bis:
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; CHECK: bis.w r14, r15
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%1 = or i8 %a, %b
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ret i8 %1
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}
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define i8 @bic(i8 %a, i8 %b) nounwind {
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; CHECK: bic:
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; CHECK: bic.b r14, r15
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%1 = xor i8 %b, -1
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%2 = and i8 %a, %1
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ret i8 %2
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}
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define i8 @xor(i8 %a, i8 %b) nounwind {
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; CHECK: xor:
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; CHECK: xor.w r14, r15
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%1 = xor i8 %a, %b
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ret i8 %1
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}
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