Shiva Chen 5071ea7ef8 [RISCV] Implement c.lui immediate operand constraint ... Implement c.lui immediate constraint to [1, 31] and [0xfffe0, 0xfffff]. The RISC-V ISA describes the constraint as [1, 63], with that value being loaded in to bits 17-12 of the destination register and sign extended from bit 17. Therefore, this 6-bit immediate can represent values in the ranges [1, 31] and [0xfffe0, 0xfffff]. Differential Revision: https://reviews.llvm.org/D42834 llvm-svn: 325792		2018-02-22 15:02:28 +00:00
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CMakeLists.txt
LLVMBuild.txt
RISCVAsmParser.cpp	[RISCV] Implement c.lui immediate operand constraint	2018-02-22 15:02:28 +00:00