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The original instruction might get legalized and erased and expanded into intermediate instructions and the intermediate instructions might fail legalization. This end up in reporting GISelFailure on the erased instruction. Instead report GISelFailure on the intermediate instruction which failed legalization. Reviewed by: ab llvm-svn: 299802
105 lines
3.9 KiB
C++
105 lines
3.9 KiB
C++
//== llvm/CodeGen/GlobalISel/LegalizerHelper.h ---------------- -*- C++ -*-==//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file A pass to convert the target-illegal operations created by IR -> MIR
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/// translation into ones the target expects to be able to select. This may
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/// occur in multiple phases, for example G_ADD <2 x i8> -> G_ADD <2 x i16> ->
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/// G_ADD <4 x i16>.
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///
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/// The LegalizerHelper class is where most of the work happens, and is
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/// designed to be callable from other passes that find themselves with an
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/// illegal instruction.
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
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#define LLVM_CODEGEN_GLOBALISEL_MACHINELEGALIZEHELPER_H
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/LowLevelType.h"
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namespace llvm {
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// Forward declarations.
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class LegalizerInfo;
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class Legalizer;
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class MachineRegisterInfo;
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class LegalizerHelper {
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public:
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enum LegalizeResult {
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/// Instruction was already legal and no change was made to the
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/// MachineFunction.
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AlreadyLegal,
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/// Instruction has been legalized and the MachineFunction changed.
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Legalized,
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/// Some kind of error has occurred and we could not legalize this
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/// instruction.
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UnableToLegalize,
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};
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LegalizerHelper(MachineFunction &MF);
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/// Replace \p MI by a sequence of legal instructions that can implement the
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/// same operation. Note that this means \p MI may be deleted, so any iterator
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/// steps should be performed before calling this function. \p Helper should
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/// be initialized to the MachineFunction containing \p MI.
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///
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/// Considered as an opaque blob, the legal code will use and define the same
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/// registers as \p MI.
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LegalizeResult legalizeInstrStep(MachineInstr &MI);
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/// Legalize an instruction by emiting a runtime library call instead.
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LegalizeResult libcall(MachineInstr &MI);
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/// Legalize an instruction by reducing the width of the underlying scalar
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/// type.
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LegalizeResult narrowScalar(MachineInstr &MI, unsigned TypeIdx, LLT NarrowTy);
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/// Legalize an instruction by performing the operation on a wider scalar type
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/// (for example a 16-bit addition can be safely performed at 32-bits
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/// precision, ignoring the unused bits).
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LegalizeResult widenScalar(MachineInstr &MI, unsigned TypeIdx, LLT WideTy);
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/// Legalize an instruction by splitting it into simpler parts, hopefully
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/// understood by the target.
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LegalizeResult lower(MachineInstr &MI, unsigned TypeIdx, LLT Ty);
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/// Legalize a vector instruction by splitting into multiple components, each
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/// acting on the same scalar type as the original but with fewer elements.
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LegalizeResult fewerElementsVector(MachineInstr &MI, unsigned TypeIdx,
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LLT NarrowTy);
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/// Legalize a vector instruction by increasing the number of vector elements
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/// involved and ignoring the added elements later.
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LegalizeResult moreElementsVector(MachineInstr &MI, unsigned TypeIdx,
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LLT WideTy);
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/// Expose MIRBuilder so clients can set their own RecordInsertInstruction
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/// functions
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MachineIRBuilder MIRBuilder;
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private:
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/// Helper function to split a wide generic register into bitwise blocks with
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/// the given Type (which implies the number of blocks needed). The generic
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/// registers created are appended to Ops, starting at bit 0 of Reg.
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void extractParts(unsigned Reg, LLT Ty, int NumParts,
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SmallVectorImpl<unsigned> &Ops);
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MachineRegisterInfo &MRI;
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const LegalizerInfo &LI;
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};
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} // End namespace llvm.
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#endif
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