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185390d230
Summary: This relaxes an assertion inside SelectionDAGBuilder which is overly restrictive on targets which have no concept of alignment (such as AVR). In these architectures, all types are aligned to 8-bits. After this, LLVM will only assert that accesses are aligned on targets which actually require alignment. This patch follows from a discussion on llvm-dev a few months ago http://llvm.1065342.n5.nabble.com/llvm-dev-Unaligned-atomic-load-store-td112815.html Reviewers: bogner, nemanjai, joerg, efriedma Reviewed By: efriedma Subscribers: efriedma, cactus, llvm-commits Differential Revision: https://reviews.llvm.org/D39946 llvm-svn: 320243 |
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| .. | ||
| Analysis | ||
| AsmParser | ||
| BinaryFormat | ||
| Bitcode | ||
| CodeGen | ||
| DebugInfo | ||
| Demangle | ||
| ExecutionEngine | ||
| Fuzzer | ||
| FuzzMutate | ||
| IR | ||
| IRReader | ||
| LineEditor | ||
| Linker | ||
| LTO | ||
| MC | ||
| Object | ||
| ObjectYAML | ||
| Option | ||
| Passes | ||
| ProfileData | ||
| Support | ||
| TableGen | ||
| Target | ||
| Testing | ||
| ToolDrivers | ||
| Transforms | ||
| WindowsManifest | ||
| XRay | ||
| CMakeLists.txt | ||
| LLVMBuild.txt | ||