Simon Pilgrim 22edb62412 [X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets ... Correct splitting of v16i16 vectors into v8i16 vectors to prevent scalarization Differential Revision: http://reviews.llvm.org/D18307 llvm-svn: 264512		2016-03-26 15:44:55 +00:00
..
Analysis	AMDGPU: Cost model for basic integer operations	2016-03-25 01:16:40 +00:00
Assembler	IR: Stop upgrading !llvm.loop attachments via MDString	2016-03-25 00:56:13 +00:00
Bindings
Bitcode	Revert "Bitcode: Collect all MDString records into a single blob"	2016-03-25 15:22:27 +00:00
BugPoint
CodeGen	[X86][AVX] Enabled MULHS/MULHU v16i16 vectors on AVX1 targets	2016-03-26 15:44:55 +00:00
DebugInfo	Consider regmasks when computing register-based DBG_VALUE live ranges	2016-03-25 17:54:46 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
LibDriver
Linker
LTO
MC	[Power9] Implement new altivec instructions: permute, count zero, extend sign, negate, parity, shift/rotate, mul10	2016-03-26 05:46:11 +00:00
Object
Other
SymbolRewriter
TableGen
ThinLTO/X86
tools	Stop testing the unspecified order in which the OnDiskHashTable stores entries.	2016-03-26 02:02:59 +00:00
Transforms	ThinLTO: use the callgraph from the combined index to drive the FunctionImporter	2016-03-26 05:40:34 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh