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7df4542eb7
These are all co-processor registers, with the exception of the floating-point deferred-trap queue register. Although these will not be lowered automatically by any instructions, it allows the use of co-processor instructions implemented by inline-assembly. Code Reviewed at http://reviews.llvm.org/D17133, with the exception of a very small change in brace placement in SparcInstrInfo.td, which was formerly causing a problem in the disassembly of the %fq register. llvm-svn: 262133
157 lines
7.1 KiB
ArmAsm
157 lines
7.1 KiB
ArmAsm
! RUN: llvm-mc %s -arch=sparcv9 -show-encoding | FileCheck %s
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! CHECK: fitos %f0, %f4 ! encoding: [0x89,0xa0,0x18,0x80]
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! CHECK: fitod %f0, %f4 ! encoding: [0x89,0xa0,0x19,0x00]
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! CHECK: fitoq %f0, %f4 ! encoding: [0x89,0xa0,0x19,0x80]
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fitos %f0, %f4
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fitod %f0, %f4
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fitoq %f0, %f4
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! CHECK: fstoi %f0, %f4 ! encoding: [0x89,0xa0,0x1a,0x20]
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! CHECK: fdtoi %f0, %f4 ! encoding: [0x89,0xa0,0x1a,0x40]
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! CHECK: fqtoi %f0, %f4 ! encoding: [0x89,0xa0,0x1a,0x60]
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fstoi %f0, %f4
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fdtoi %f0, %f4
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fqtoi %f0, %f4
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! CHECK: fstod %f0, %f4 ! encoding: [0x89,0xa0,0x19,0x20]
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! CHECK: fstoq %f0, %f4 ! encoding: [0x89,0xa0,0x19,0xa0]
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fstod %f0, %f4
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fstoq %f0, %f4
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! CHECK: fdtos %f0, %f4 ! encoding: [0x89,0xa0,0x18,0xc0]
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! CHECK: fdtoq %f0, %f4 ! encoding: [0x89,0xa0,0x19,0xc0]
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fdtos %f0, %f4
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fdtoq %f0, %f4
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! CHECK: fqtos %f0, %f4 ! encoding: [0x89,0xa0,0x18,0xe0]
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! CHECK: fqtod %f0, %f4 ! encoding: [0x89,0xa0,0x19,0x60]
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fqtos %f0, %f4
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fqtod %f0, %f4
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! CHECK: fmovs %f0, %f4 ! encoding: [0x89,0xa0,0x00,0x20]
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! CHECK: fmovd %f0, %f4 ! encoding: [0x89,0xa0,0x00,0x40]
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! CHECK: fmovq %f0, %f4 ! encoding: [0x89,0xa0,0x00,0x60]
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fmovs %f0, %f4
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fmovd %f0, %f4
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fmovq %f0, %f4
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! CHECK: fnegs %f0, %f4 ! encoding: [0x89,0xa0,0x00,0xa0]
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! CHECK: fnegd %f0, %f4 ! encoding: [0x89,0xa0,0x00,0xc0]
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! CHECK: fnegq %f0, %f4 ! encoding: [0x89,0xa0,0x00,0xe0]
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fnegs %f0, %f4
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fnegd %f0, %f4
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fnegq %f0, %f4
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! CHECK: fabss %f0, %f4 ! encoding: [0x89,0xa0,0x01,0x20]
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! CHECK: fabsd %f0, %f4 ! encoding: [0x89,0xa0,0x01,0x40]
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! CHECK: fabsq %f0, %f4 ! encoding: [0x89,0xa0,0x01,0x60]
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fabss %f0, %f4
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fabsd %f0, %f4
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fabsq %f0, %f4
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! CHECK: fsqrts %f0, %f4 ! encoding: [0x89,0xa0,0x05,0x20]
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! CHECK: fsqrtd %f0, %f4 ! encoding: [0x89,0xa0,0x05,0x40]
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! CHECK: fsqrtq %f0, %f4 ! encoding: [0x89,0xa0,0x05,0x60]
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fsqrts %f0, %f4
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fsqrtd %f0, %f4
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fsqrtq %f0, %f4
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! CHECK: fadds %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x24]
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! CHECK: faddd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x44]
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! CHECK: faddq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0x64]
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fadds %f0, %f4, %f8
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faddd %f0, %f4, %f8
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faddq %f0, %f4, %f8
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! make sure we can handle V9 double registers and their aliased quad registers.
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! CHECK: faddd %f32, %f34, %f62 ! encoding: [0xbf,0xa0,0x48,0x43]
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! CHECK: faddq %f32, %f36, %f60 ! encoding: [0xbb,0xa0,0x48,0x65]
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faddd %f32, %f34, %f62
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faddq %f32, %f36, %f60
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! CHECK: fsubs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xa4]
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! CHECK: fsubd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xc4]
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! CHECK: fsubq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x08,0xe4]
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fsubs %f0, %f4, %f8
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fsubd %f0, %f4, %f8
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fsubq %f0, %f4, %f8
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! CHECK: fmuls %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0x24]
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! CHECK: fmuld %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0x44]
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! CHECK: fmulq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0x64]
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fmuls %f0, %f4, %f8
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fmuld %f0, %f4, %f8
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fmulq %f0, %f4, %f8
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! CHECK: fsmuld %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x0d,0x24]
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! CHECK: fdmulq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x0d,0xc4]
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fsmuld %f0, %f4, %f8
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fdmulq %f0, %f4, %f8
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! CHECK: fdivs %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0xa4]
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! CHECK: fdivd %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0xc4]
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! CHECK: fdivq %f0, %f4, %f8 ! encoding: [0x91,0xa0,0x09,0xe4]
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fdivs %f0, %f4, %f8
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fdivd %f0, %f4, %f8
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fdivq %f0, %f4, %f8
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! CHECK: fcmps %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x24]
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! CHECK: fcmpd %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x44]
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! CHECK: fcmpq %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0x64]
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fcmps %f0, %f4
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fcmpd %f0, %f4
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fcmpq %f0, %f4
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! CHECK: fcmpes %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xa4]
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! CHECK: fcmped %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xc4]
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! CHECK: fcmpeq %f0, %f4 ! encoding: [0x81,0xa8,0x0a,0xe4]
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fcmpes %f0, %f4
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fcmped %f0, %f4
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fcmpeq %f0, %f4
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! CHECK: fcmps %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x24]
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! CHECK: fcmpd %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x44]
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! CHECK: fcmpq %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0x64]
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fcmps %fcc2, %f0, %f4
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fcmpd %fcc2, %f0, %f4
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fcmpq %fcc2, %f0, %f4
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! CHECK: fcmpes %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xa4]
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! CHECK: fcmped %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xc4]
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! CHECK: fcmpeq %fcc2, %f0, %f4 ! encoding: [0x85,0xa8,0x0a,0xe4]
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fcmpes %fcc2, %f0, %f4
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fcmped %fcc2, %f0, %f4
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fcmpeq %fcc2, %f0, %f4
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! CHECK: fxtos %f0, %f4 ! encoding: [0x89,0xa0,0x10,0x80]
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! CHECK: fxtod %f0, %f4 ! encoding: [0x89,0xa0,0x11,0x00]
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! CHECK: fxtoq %f0, %f4 ! encoding: [0x89,0xa0,0x11,0x80]
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fxtos %f0, %f4
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fxtod %f0, %f4
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fxtoq %f0, %f4
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! CHECK: fstox %f0, %f4 ! encoding: [0x89,0xa0,0x10,0x20]
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! CHECK: fdtox %f0, %f4 ! encoding: [0x89,0xa0,0x10,0x40]
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! CHECK: fqtox %f0, %f4 ! encoding: [0x89,0xa0,0x10,0x60]
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fstox %f0, %f4
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fdtox %f0, %f4
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fqtox %f0, %f4
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! CHECK: ld [%l0], %f29 ! encoding: [0xfb,0x04,0x00,0x00]
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! CHECK: ldd [%l0], %f48 ! encoding: [0xe3,0x1c,0x00,0x00]
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ld [%l0], %f29
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ldd [%l0], %f48
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! CHECK: st %f29, [%l0] ! encoding: [0xfb,0x24,0x00,0x00]
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! CHECK: std %f48, [%l0] ! encoding: [0xe3,0x3c,0x00,0x00]
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st %f29, [%l0]
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std %f48, [%l0]
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! CHECK: std %fq, [%o4] ! encoding: [0xc1,0x33,0x00,0x00]
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! CHECK: std %fq, [%l1+62] ! encoding: [0xc1,0x34,0x60,0x3e]
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! CHECK: std %fq, [%i3+%l7] ! encoding: [0xc1,0x36,0xc0,0x17]
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std %fq, [%o4]
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std %fq, [%l1+62]
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std %fq, [%i3+%l7]
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