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dd9ab77318
Currently the default C calling convention functions are treated the same as compute kernels. Make this explicit so the default calling convention can be changed to a non-kernel. Converted with perl -pi -e 's/define void/define amdgpu_kernel void/' on the relevant test directories (and undoing in one place that actually wanted a non-kernel). llvm-svn: 298444
44 lines
1.1 KiB
YAML
44 lines
1.1 KiB
YAML
# RUN: llc -march=amdgcn -run-pass si-fix-sgpr-copies %s -o - | FileCheck %s -check-prefixes=GCN
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--- |
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define amdgpu_kernel void @phi_visit_order() { ret void }
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name: phi_visit_order
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tracksRegLiveness: true
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registers:
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- { id: 0, class: sreg_32_xm0 }
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- { id: 1, class: sreg_64 }
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- { id: 2, class: sreg_32_xm0 }
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- { id: 7, class: vgpr_32 }
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- { id: 8, class: sreg_32_xm0 }
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- { id: 9, class: vgpr_32 }
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- { id: 10, class: sreg_64 }
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- { id: 11, class: sreg_32_xm0 }
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body: |
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; GCN-LABEL: name: phi_visit_order
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; GCN: V_ADD_I32
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bb.0:
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liveins: %vgpr0
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successors: %bb.1
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%7 = COPY %vgpr0
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%8 = S_MOV_B32 0
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bb.1:
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successors: %bb.1, %bb.2
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%0 = PHI %8, %bb.0, %0, %bb.1, %2, %bb.2
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%9 = V_MOV_B32_e32 9, implicit %exec
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%10 = V_CMP_EQ_U32_e64 %7, %9, implicit %exec
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%1 = SI_IF %10, %bb.2, implicit-def %exec, implicit-def %scc, implicit %exec
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S_BRANCH %bb.1
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bb.2:
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successors: %bb.1
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SI_END_CF %1, implicit-def %exec, implicit-def %scc, implicit %exec
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%11 = S_MOV_B32 1
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%2 = S_ADD_I32 %0, %11, implicit-def %scc
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S_BRANCH %bb.1
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...
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---
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