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Thomas Lively 67397ff9ab [WebAssembly] Renumber SIMD opcodes 
Summary:
As described in https://github.com/WebAssembly/simd/pull/209. This is
the final reorganization of the SIMD opcode space before
standardization. It has been landed in concert with corresponding
changes in other projects in the WebAssembly SIMD ecosystem.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, hiraditya, sunfish, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D79224
2020-05-01 17:20:49 -07:00
..
AArch64 [AArch64] Remove inexistent system register ERXTS_EL1 2020-04-29 16:43:48 +01:00
AMDGPU
ARM
AsmParser
AVR
BPF
COFF
Disassembler [WebAssembly] Renumber SIMD opcodes 2020-05-01 17:20:49 -07:00
ELF
Hexagon
Lanai
MachO
Mips
MSP430
PowerPC [PowerPC] Fix downcast from nullptr for target streamer 2020-04-28 09:20:10 +00:00
RISCV
Sparc
SystemZ [SystemZ] Allow specifying plain register numbers in AsmParser 2020-04-29 20:42:30 +02:00
WebAssembly [WebAssembly] Renumber SIMD opcodes 2020-05-01 17:20:49 -07:00
X86