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2eba84f7a1
Also add mappings for single and double precision FP, and use them for G_FADD and G_LOAD. llvm-svn: 295302
15 lines
539 B
TableGen
15 lines
539 B
TableGen
//=- ARMRegisterBank.td - Describe the AArch64 Banks ---------*- tablegen -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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//
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//===----------------------------------------------------------------------===//
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def GPRRegBank : RegisterBank<"GPRB", [GPR, GPRwithAPSR]>;
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def FPRRegBank : RegisterBank<"FPRB", [SPR, DPR]>;
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