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666 lines
25 KiB
C++
666 lines
25 KiB
C++
//=- llvm/CodeGen/GlobalISel/RegBankSelect.h - Reg Bank Selector --*- C++ -*-=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file This file describes the interface of the MachineFunctionPass
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/// responsible for assigning the generic virtual registers to register bank.
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/// By default, the reg bank selector relies on local decisions to
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/// assign the register bank. In other words, it looks at one instruction
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/// at a time to decide where the operand of that instruction should live.
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///
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/// At higher optimization level, we could imagine that the reg bank selector
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/// would use more global analysis and do crazier thing like duplicating
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/// instructions and so on. This is future work.
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///
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/// For now, the pass uses a greedy algorithm to decide where the operand
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/// of an instruction should live. It asks the target which banks may be
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/// used for each operand of the instruction and what is the cost. Then,
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/// it chooses the solution which minimize the cost of the instruction plus
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/// the cost of any move that may be needed to the values into the right
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/// register bank.
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/// In other words, the cost for an instruction on a register bank RegBank
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/// is: Cost of I on RegBank plus the sum of the cost for bringing the
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/// input operands from their current register bank to RegBank.
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/// Thus, the following formula:
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/// cost(I, RegBank) = cost(I.Opcode, RegBank) +
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/// sum(for each arg in I.arguments: costCrossCopy(arg.RegBank, RegBank))
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///
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/// E.g., Let say we are assigning the register bank for the instruction
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/// defining v2.
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/// v0(A_REGBANK) = ...
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/// v1(A_REGBANK) = ...
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/// v2 = G_ADD i32 v0, v1 <-- MI
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///
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/// The target may say it can generate G_ADD i32 on register bank A and B
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/// with a cost of respectively 5 and 1.
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/// Then, let say the cost of a cross register bank copies from A to B is 1.
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/// The reg bank selector would compare the following two costs:
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/// cost(MI, A_REGBANK) = cost(G_ADD, A_REGBANK) + cost(v0.RegBank, A_REGBANK) +
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/// cost(v1.RegBank, A_REGBANK)
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/// = 5 + cost(A_REGBANK, A_REGBANK) + cost(A_REGBANK,
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/// A_REGBANK)
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/// = 5 + 0 + 0 = 5
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/// cost(MI, B_REGBANK) = cost(G_ADD, B_REGBANK) + cost(v0.RegBank, B_REGBANK) +
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/// cost(v1.RegBank, B_REGBANK)
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/// = 1 + cost(A_REGBANK, B_REGBANK) + cost(A_REGBANK,
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/// B_REGBANK)
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/// = 1 + 1 + 1 = 3
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/// Therefore, in this specific example, the reg bank selector would choose
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/// bank B for MI.
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/// v0(A_REGBANK) = ...
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/// v1(A_REGBANK) = ...
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/// tmp0(B_REGBANK) = COPY v0
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/// tmp1(B_REGBANK) = COPY v1
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/// v2(B_REGBANK) = G_ADD i32 tmp0, tmp1
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
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#define LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/CodeGen/GlobalISel/MachineIRBuilder.h"
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#include "llvm/CodeGen/GlobalISel/RegisterBankInfo.h"
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#include "llvm/CodeGen/MachineBasicBlock.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineOptimizationRemarkEmitter.h"
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#include <cassert>
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#include <cstdint>
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#include <memory>
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namespace llvm {
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class BlockFrequency;
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class MachineBlockFrequencyInfo;
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class MachineBranchProbabilityInfo;
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class MachineOperand;
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class MachineRegisterInfo;
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class Pass;
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class raw_ostream;
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class TargetPassConfig;
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class TargetRegisterInfo;
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/// This pass implements the reg bank selector pass used in the GlobalISel
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/// pipeline. At the end of this pass, all register operands have been assigned
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class RegBankSelect : public MachineFunctionPass {
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public:
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static char ID;
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/// List of the modes supported by the RegBankSelect pass.
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enum Mode {
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/// Assign the register banks as fast as possible (default).
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Fast,
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/// Greedily minimize the cost of assigning register banks.
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/// This should produce code of greater quality, but will
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/// require more compile time.
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Greedy
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};
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/// Abstract class used to represent an insertion point in a CFG.
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/// This class records an insertion point and materializes it on
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/// demand.
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/// It allows to reason about the frequency of this insertion point,
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/// without having to logically materialize it (e.g., on an edge),
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/// before we actually need to insert something.
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class InsertPoint {
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protected:
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/// Tell if the insert point has already been materialized.
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bool WasMaterialized = false;
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/// Materialize the insertion point.
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///
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/// If isSplit() is true, this involves actually splitting
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/// the block or edge.
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///
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/// \post getPointImpl() returns a valid iterator.
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/// \post getInsertMBBImpl() returns a valid basic block.
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/// \post isSplit() == false ; no more splitting should be required.
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virtual void materialize() = 0;
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/// Return the materialized insertion basic block.
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/// Code will be inserted into that basic block.
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///
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/// \pre ::materialize has been called.
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virtual MachineBasicBlock &getInsertMBBImpl() = 0;
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/// Return the materialized insertion point.
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/// Code will be inserted before that point.
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///
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/// \pre ::materialize has been called.
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virtual MachineBasicBlock::iterator getPointImpl() = 0;
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public:
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virtual ~InsertPoint() = default;
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/// The first call to this method will cause the splitting to
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/// happen if need be, then sub sequent calls just return
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/// the iterator to that point. I.e., no more splitting will
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/// occur.
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///
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/// \return The iterator that should be used with
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/// MachineBasicBlock::insert. I.e., additional code happens
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/// before that point.
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MachineBasicBlock::iterator getPoint() {
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if (!WasMaterialized) {
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WasMaterialized = true;
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assert(canMaterialize() && "Impossible to materialize this point");
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materialize();
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}
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// When we materialized the point we should have done the splitting.
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assert(!isSplit() && "Wrong pre-condition");
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return getPointImpl();
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}
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/// The first call to this method will cause the splitting to
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/// happen if need be, then sub sequent calls just return
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/// the basic block that contains the insertion point.
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/// I.e., no more splitting will occur.
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///
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/// \return The basic block should be used with
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/// MachineBasicBlock::insert and ::getPoint. The new code should
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/// happen before that point.
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MachineBasicBlock &getInsertMBB() {
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if (!WasMaterialized) {
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WasMaterialized = true;
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assert(canMaterialize() && "Impossible to materialize this point");
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materialize();
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}
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// When we materialized the point we should have done the splitting.
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assert(!isSplit() && "Wrong pre-condition");
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return getInsertMBBImpl();
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}
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/// Insert \p MI in the just before ::getPoint()
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MachineBasicBlock::iterator insert(MachineInstr &MI) {
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return getInsertMBB().insert(getPoint(), &MI);
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}
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/// Does this point involve splitting an edge or block?
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/// As soon as ::getPoint is called and thus, the point
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/// materialized, the point will not require splitting anymore,
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/// i.e., this will return false.
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virtual bool isSplit() const { return false; }
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/// Frequency of the insertion point.
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/// \p P is used to access the various analysis that will help to
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/// get that information, like MachineBlockFrequencyInfo. If \p P
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/// does not contain enough enough to return the actual frequency,
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/// this returns 1.
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virtual uint64_t frequency(const Pass &P) const { return 1; }
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/// Check whether this insertion point can be materialized.
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/// As soon as ::getPoint is called and thus, the point materialized
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/// calling this method does not make sense.
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virtual bool canMaterialize() const { return false; }
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};
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/// Insertion point before or after an instruction.
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class InstrInsertPoint : public InsertPoint {
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private:
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/// Insertion point.
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MachineInstr &Instr;
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/// Does the insertion point is before or after Instr.
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bool Before;
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void materialize() override;
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MachineBasicBlock::iterator getPointImpl() override {
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if (Before)
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return Instr;
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return Instr.getNextNode() ? *Instr.getNextNode()
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: Instr.getParent()->end();
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}
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MachineBasicBlock &getInsertMBBImpl() override {
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return *Instr.getParent();
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}
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public:
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/// Create an insertion point before (\p Before=true) or after \p Instr.
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InstrInsertPoint(MachineInstr &Instr, bool Before = true);
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bool isSplit() const override;
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uint64_t frequency(const Pass &P) const override;
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// Worst case, we need to slice the basic block, but that is still doable.
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bool canMaterialize() const override { return true; }
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};
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/// Insertion point at the beginning or end of a basic block.
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class MBBInsertPoint : public InsertPoint {
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private:
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/// Insertion point.
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MachineBasicBlock &MBB;
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/// Does the insertion point is at the beginning or end of MBB.
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bool Beginning;
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void materialize() override { /*Nothing to do to materialize*/
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}
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MachineBasicBlock::iterator getPointImpl() override {
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return Beginning ? MBB.begin() : MBB.end();
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}
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MachineBasicBlock &getInsertMBBImpl() override { return MBB; }
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public:
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MBBInsertPoint(MachineBasicBlock &MBB, bool Beginning = true)
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: InsertPoint(), MBB(MBB), Beginning(Beginning) {
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// If we try to insert before phis, we should use the insertion
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// points on the incoming edges.
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assert((!Beginning || MBB.getFirstNonPHI() == MBB.begin()) &&
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"Invalid beginning point");
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// If we try to insert after the terminators, we should use the
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// points on the outcoming edges.
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assert((Beginning || MBB.getFirstTerminator() == MBB.end()) &&
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"Invalid end point");
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}
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bool isSplit() const override { return false; }
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uint64_t frequency(const Pass &P) const override;
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bool canMaterialize() const override { return true; };
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};
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/// Insertion point on an edge.
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class EdgeInsertPoint : public InsertPoint {
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private:
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/// Source of the edge.
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MachineBasicBlock &Src;
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/// Destination of the edge.
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/// After the materialization is done, this hold the basic block
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/// that resulted from the splitting.
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MachineBasicBlock *DstOrSplit;
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/// P is used to update the analysis passes as applicable.
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Pass &P;
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void materialize() override;
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MachineBasicBlock::iterator getPointImpl() override {
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// DstOrSplit should be the Split block at this point.
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// I.e., it should have one predecessor, Src, and one successor,
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// the original Dst.
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assert(DstOrSplit && DstOrSplit->isPredecessor(&Src) &&
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DstOrSplit->pred_size() == 1 && DstOrSplit->succ_size() == 1 &&
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"Did not split?!");
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return DstOrSplit->begin();
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}
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MachineBasicBlock &getInsertMBBImpl() override { return *DstOrSplit; }
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public:
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EdgeInsertPoint(MachineBasicBlock &Src, MachineBasicBlock &Dst, Pass &P)
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: InsertPoint(), Src(Src), DstOrSplit(&Dst), P(P) {}
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bool isSplit() const override {
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return Src.succ_size() > 1 && DstOrSplit->pred_size() > 1;
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}
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uint64_t frequency(const Pass &P) const override;
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bool canMaterialize() const override;
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};
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/// Struct used to represent the placement of a repairing point for
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/// a given operand.
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class RepairingPlacement {
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public:
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/// Define the kind of action this repairing needs.
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enum RepairingKind {
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/// Nothing to repair, just drop this action.
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None,
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/// Reparing code needs to happen before InsertPoints.
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Insert,
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/// (Re)assign the register bank of the operand.
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Reassign,
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/// Mark this repairing placement as impossible.
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Impossible
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};
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/// \name Convenient types for a list of insertion points.
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/// @{
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using InsertionPoints = SmallVector<std::unique_ptr<InsertPoint>, 2>;
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using insertpt_iterator = InsertionPoints::iterator;
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using const_insertpt_iterator = InsertionPoints::const_iterator;
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/// @}
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private:
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/// Kind of repairing.
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RepairingKind Kind;
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/// Index of the operand that will be repaired.
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unsigned OpIdx;
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/// Are all the insert points materializeable?
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bool CanMaterialize;
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/// Is there any of the insert points needing splitting?
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bool HasSplit = false;
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/// Insertion point for the repair code.
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/// The repairing code needs to happen just before these points.
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InsertionPoints InsertPoints;
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/// Some insertion points may need to update the liveness and such.
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Pass &P;
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public:
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/// Create a repairing placement for the \p OpIdx-th operand of
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/// \p MI. \p TRI is used to make some checks on the register aliases
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/// if the machine operand is a physical register. \p P is used to
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/// to update liveness information and such when materializing the
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/// points.
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RepairingPlacement(MachineInstr &MI, unsigned OpIdx,
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const TargetRegisterInfo &TRI, Pass &P,
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RepairingKind Kind = RepairingKind::Insert);
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/// \name Getters.
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/// @{
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RepairingKind getKind() const { return Kind; }
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unsigned getOpIdx() const { return OpIdx; }
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bool canMaterialize() const { return CanMaterialize; }
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bool hasSplit() { return HasSplit; }
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/// @}
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/// \name Overloaded methods to add an insertion point.
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/// @{
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/// Add a MBBInsertionPoint to the list of InsertPoints.
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void addInsertPoint(MachineBasicBlock &MBB, bool Beginning);
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/// Add a InstrInsertionPoint to the list of InsertPoints.
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void addInsertPoint(MachineInstr &MI, bool Before);
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/// Add an EdgeInsertionPoint (\p Src, \p Dst) to the list of InsertPoints.
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void addInsertPoint(MachineBasicBlock &Src, MachineBasicBlock &Dst);
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/// Add an InsertPoint to the list of insert points.
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/// This method takes the ownership of &\p Point.
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void addInsertPoint(InsertPoint &Point);
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/// @}
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/// \name Accessors related to the insertion points.
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/// @{
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insertpt_iterator begin() { return InsertPoints.begin(); }
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insertpt_iterator end() { return InsertPoints.end(); }
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const_insertpt_iterator begin() const { return InsertPoints.begin(); }
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const_insertpt_iterator end() const { return InsertPoints.end(); }
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unsigned getNumInsertPoints() const { return InsertPoints.size(); }
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/// @}
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/// Change the type of this repairing placement to \p NewKind.
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/// It is not possible to switch a repairing placement to the
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/// RepairingKind::Insert. There is no fundamental problem with
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/// that, but no uses as well, so do not support it for now.
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///
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/// \pre NewKind != RepairingKind::Insert
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/// \post getKind() == NewKind
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void switchTo(RepairingKind NewKind) {
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assert(NewKind != Kind && "Already of the right Kind");
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Kind = NewKind;
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InsertPoints.clear();
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CanMaterialize = NewKind != RepairingKind::Impossible;
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HasSplit = false;
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assert(NewKind != RepairingKind::Insert &&
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"We would need more MI to switch to Insert");
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}
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};
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private:
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/// Helper class used to represent the cost for mapping an instruction.
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/// When mapping an instruction, we may introduce some repairing code.
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/// In most cases, the repairing code is local to the instruction,
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/// thus, we can omit the basic block frequency from the cost.
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/// However, some alternatives may produce non-local cost, e.g., when
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/// repairing a phi, and thus we then need to scale the local cost
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/// to the non-local cost. This class does this for us.
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/// \note: We could simply always scale the cost. The problem is that
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/// there are higher chances that we saturate the cost easier and end
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/// up having the same cost for actually different alternatives.
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/// Another option would be to use APInt everywhere.
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class MappingCost {
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private:
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/// Cost of the local instructions.
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/// This cost is free of basic block frequency.
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uint64_t LocalCost = 0;
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/// Cost of the non-local instructions.
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/// This cost should include the frequency of the related blocks.
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uint64_t NonLocalCost = 0;
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/// Frequency of the block where the local instructions live.
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uint64_t LocalFreq;
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MappingCost(uint64_t LocalCost, uint64_t NonLocalCost, uint64_t LocalFreq)
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: LocalCost(LocalCost), NonLocalCost(NonLocalCost),
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LocalFreq(LocalFreq) {}
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/// Check if this cost is saturated.
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bool isSaturated() const;
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public:
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/// Create a MappingCost assuming that most of the instructions
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/// will occur in a basic block with \p LocalFreq frequency.
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MappingCost(const BlockFrequency &LocalFreq);
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/// Add \p Cost to the local cost.
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/// \return true if this cost is saturated, false otherwise.
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bool addLocalCost(uint64_t Cost);
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/// Add \p Cost to the non-local cost.
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/// Non-local cost should reflect the frequency of their placement.
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/// \return true if this cost is saturated, false otherwise.
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bool addNonLocalCost(uint64_t Cost);
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/// Saturate the cost to the maximal representable value.
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void saturate();
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/// Return an instance of MappingCost that represents an
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/// impossible mapping.
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static MappingCost ImpossibleCost();
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/// Check if this is less than \p Cost.
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bool operator<(const MappingCost &Cost) const;
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/// Check if this is equal to \p Cost.
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bool operator==(const MappingCost &Cost) const;
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/// Check if this is not equal to \p Cost.
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bool operator!=(const MappingCost &Cost) const { return !(*this == Cost); }
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/// Check if this is greater than \p Cost.
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bool operator>(const MappingCost &Cost) const {
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return *this != Cost && Cost < *this;
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}
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/// Print this on dbgs() stream.
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void dump() const;
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/// Print this on \p OS;
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void print(raw_ostream &OS) const;
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/// Overload the stream operator for easy debug printing.
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friend raw_ostream &operator<<(raw_ostream &OS, const MappingCost &Cost) {
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Cost.print(OS);
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return OS;
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}
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};
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/// Interface to the target lowering info related
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/// to register banks.
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const RegisterBankInfo *RBI = nullptr;
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/// MRI contains all the register class/bank information that this
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/// pass uses and updates.
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MachineRegisterInfo *MRI = nullptr;
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/// Information on the register classes for the current function.
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const TargetRegisterInfo *TRI = nullptr;
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/// Get the frequency of blocks.
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/// This is required for non-fast mode.
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MachineBlockFrequencyInfo *MBFI = nullptr;
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|
|
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/// Get the frequency of the edges.
|
|
/// This is required for non-fast mode.
|
|
MachineBranchProbabilityInfo *MBPI = nullptr;
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|
|
|
/// Current optimization remark emitter. Used to report failures.
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|
std::unique_ptr<MachineOptimizationRemarkEmitter> MORE;
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|
|
|
/// Helper class used for every code morphing.
|
|
MachineIRBuilder MIRBuilder;
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|
|
|
/// Optimization mode of the pass.
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|
Mode OptMode;
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|
|
|
/// Current target configuration. Controls how the pass handles errors.
|
|
const TargetPassConfig *TPC;
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|
|
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/// Assign the register bank of each operand of \p MI.
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|
/// \return True on success, false otherwise.
|
|
bool assignInstr(MachineInstr &MI);
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|
|
|
/// Initialize the field members using \p MF.
|
|
void init(MachineFunction &MF);
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|
|
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/// Check if \p Reg is already assigned what is described by \p ValMapping.
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|
/// \p OnlyAssign == true means that \p Reg just needs to be assigned a
|
|
/// register bank. I.e., no repairing is necessary to have the
|
|
/// assignment match.
|
|
bool assignmentMatch(unsigned Reg,
|
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const RegisterBankInfo::ValueMapping &ValMapping,
|
|
bool &OnlyAssign) const;
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|
|
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/// Insert repairing code for \p Reg as specified by \p ValMapping.
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|
/// The repairing placement is specified by \p RepairPt.
|
|
/// \p NewVRegs contains all the registers required to remap \p Reg.
|
|
/// In other words, the number of registers in NewVRegs must be equal
|
|
/// to ValMapping.BreakDown.size().
|
|
///
|
|
/// The transformation could be sketched as:
|
|
/// \code
|
|
/// ... = op Reg
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|
/// \endcode
|
|
/// Becomes
|
|
/// \code
|
|
/// <NewRegs> = COPY or extract Reg
|
|
/// ... = op Reg
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|
/// \endcode
|
|
///
|
|
/// and
|
|
/// \code
|
|
/// Reg = op ...
|
|
/// \endcode
|
|
/// Becomes
|
|
/// \code
|
|
/// Reg = op ...
|
|
/// Reg = COPY or build_sequence <NewRegs>
|
|
/// \endcode
|
|
///
|
|
/// \pre NewVRegs.size() == ValMapping.BreakDown.size()
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|
///
|
|
/// \note The caller is supposed to do the rewriting of op if need be.
|
|
/// I.e., Reg = op ... => <NewRegs> = NewOp ...
|
|
///
|
|
/// \return True if the repairing worked, false otherwise.
|
|
bool repairReg(MachineOperand &MO,
|
|
const RegisterBankInfo::ValueMapping &ValMapping,
|
|
RegBankSelect::RepairingPlacement &RepairPt,
|
|
const iterator_range<SmallVectorImpl<unsigned>::const_iterator>
|
|
&NewVRegs);
|
|
|
|
/// Return the cost of the instruction needed to map \p MO to \p ValMapping.
|
|
/// The cost is free of basic block frequencies.
|
|
/// \pre MO.isReg()
|
|
/// \pre MO is assigned to a register bank.
|
|
/// \pre ValMapping is a valid mapping for MO.
|
|
uint64_t
|
|
getRepairCost(const MachineOperand &MO,
|
|
const RegisterBankInfo::ValueMapping &ValMapping) const;
|
|
|
|
/// Find the best mapping for \p MI from \p PossibleMappings.
|
|
/// \return a reference on the best mapping in \p PossibleMappings.
|
|
const RegisterBankInfo::InstructionMapping &
|
|
findBestMapping(MachineInstr &MI,
|
|
RegisterBankInfo::InstructionMappings &PossibleMappings,
|
|
SmallVectorImpl<RepairingPlacement> &RepairPts);
|
|
|
|
/// Compute the cost of mapping \p MI with \p InstrMapping and
|
|
/// compute the repairing placement for such mapping in \p
|
|
/// RepairPts.
|
|
/// \p BestCost is used to specify when the cost becomes too high
|
|
/// and thus it is not worth computing the RepairPts. Moreover if
|
|
/// \p BestCost == nullptr, the mapping cost is actually not
|
|
/// computed.
|
|
MappingCost
|
|
computeMapping(MachineInstr &MI,
|
|
const RegisterBankInfo::InstructionMapping &InstrMapping,
|
|
SmallVectorImpl<RepairingPlacement> &RepairPts,
|
|
const MappingCost *BestCost = nullptr);
|
|
|
|
/// When \p RepairPt involves splitting to repair \p MO for the
|
|
/// given \p ValMapping, try to change the way we repair such that
|
|
/// the splitting is not required anymore.
|
|
///
|
|
/// \pre \p RepairPt.hasSplit()
|
|
/// \pre \p MO == MO.getParent()->getOperand(\p RepairPt.getOpIdx())
|
|
/// \pre \p ValMapping is the mapping of \p MO for MO.getParent()
|
|
/// that implied \p RepairPt.
|
|
void tryAvoidingSplit(RegBankSelect::RepairingPlacement &RepairPt,
|
|
const MachineOperand &MO,
|
|
const RegisterBankInfo::ValueMapping &ValMapping) const;
|
|
|
|
/// Apply \p Mapping to \p MI. \p RepairPts represents the different
|
|
/// mapping action that need to happen for the mapping to be
|
|
/// applied.
|
|
/// \return True if the mapping was applied sucessfully, false otherwise.
|
|
bool applyMapping(MachineInstr &MI,
|
|
const RegisterBankInfo::InstructionMapping &InstrMapping,
|
|
SmallVectorImpl<RepairingPlacement> &RepairPts);
|
|
|
|
public:
|
|
/// Create a RegBankSelect pass with the specified \p RunningMode.
|
|
RegBankSelect(Mode RunningMode = Fast);
|
|
|
|
StringRef getPassName() const override { return "RegBankSelect"; }
|
|
|
|
void getAnalysisUsage(AnalysisUsage &AU) const override;
|
|
|
|
MachineFunctionProperties getRequiredProperties() const override {
|
|
return MachineFunctionProperties()
|
|
.set(MachineFunctionProperties::Property::IsSSA)
|
|
.set(MachineFunctionProperties::Property::Legalized);
|
|
}
|
|
|
|
MachineFunctionProperties getSetProperties() const override {
|
|
return MachineFunctionProperties().set(
|
|
MachineFunctionProperties::Property::RegBankSelected);
|
|
}
|
|
|
|
/// Walk through \p MF and assign a register bank to every virtual register
|
|
/// that are still mapped to nothing.
|
|
/// The target needs to provide a RegisterBankInfo and in particular
|
|
/// override RegisterBankInfo::getInstrMapping.
|
|
///
|
|
/// Simplified algo:
|
|
/// \code
|
|
/// RBI = MF.subtarget.getRegBankInfo()
|
|
/// MIRBuilder.setMF(MF)
|
|
/// for each bb in MF
|
|
/// for each inst in bb
|
|
/// MIRBuilder.setInstr(inst)
|
|
/// MappingCosts = RBI.getMapping(inst);
|
|
/// Idx = findIdxOfMinCost(MappingCosts)
|
|
/// CurRegBank = MappingCosts[Idx].RegBank
|
|
/// MRI.setRegBank(inst.getOperand(0).getReg(), CurRegBank)
|
|
/// for each argument in inst
|
|
/// if (CurRegBank != argument.RegBank)
|
|
/// ArgReg = argument.getReg()
|
|
/// Tmp = MRI.createNewVirtual(MRI.getSize(ArgReg), CurRegBank)
|
|
/// MIRBuilder.buildInstr(COPY, Tmp, ArgReg)
|
|
/// inst.getOperand(argument.getOperandNo()).setReg(Tmp)
|
|
/// \endcode
|
|
bool runOnMachineFunction(MachineFunction &MF) override;
|
|
};
|
|
|
|
} // end namespace llvm
|
|
|
|
#endif // LLVM_CODEGEN_GLOBALISEL_REGBANKSELECT_H
|