Andrei Elovikov 1937c83616 Test commit. ... llvm-svn: 313617		2017-09-19 07:56:20 +00:00
..
AArch64	[LoopVectorizer] Add more testcases for PR33804.	2017-09-18 17:28:15 +00:00
AMDGPU	AMDGPU: Run internalize symbols at -O0	2017-09-19 07:40:11 +00:00
ARC
ARM	[LoopVectorizer] Add more testcases for PR33804.	2017-09-18 17:28:15 +00:00
AVR
BPF	bpf: add inline-asm support	2017-09-18 23:29:36 +00:00
Generic
Hexagon	[IfConversion] More simple, correct dead/kill liveness handling	2017-09-14 15:53:11 +00:00
Inputs
Lanai
Mips	[mips] Pick the right variant of DINS upfront and enable target instruction verification	2017-09-14 10:58:00 +00:00
MIR
MSP430
Nios2
NVPTX
PowerPC	[XRay][CodeGen] Use the current function symbol as the associated symbol for the instrumentation map	2017-09-14 07:08:23 +00:00
SPARC
SystemZ	Move llvm/test/CodeGen/X86/clear-liverange-spillreg.mir to SystemZ. It was in wrong place.	2017-09-14 00:03:23 +00:00
Thumb
Thumb2
WebAssembly	[WebAssembly] Add sign extend instructions from atomics proposal	2017-09-13 00:29:06 +00:00
WinEH
X86	Test commit.	2017-09-19 07:56:20 +00:00
XCore