Tim Northover 5f7a3665f1 ARM: don't attempt to merge litpools referencing different PC-anchors. ... Given something like: ldr r0, .LCPI0_0 (== pc-rel var) add r0, pc ldr r1, .LCPI0_1 (== pc-rel var) add r1, pc we cannot combine the 2 ldr instructions and litpools because they get added to a different pc to form the correct address. I think the original logic came from a time when we fused the LDRpci/PICADD instructions into one pseudo-instruction so the PC was always immediately at-hand. That's no longer the case. Should fix general-dynamic TLS access on Linux, and quite possibly other -fPIC code that relies on litpools (e.g. v6m and -Oz compilations) though trivial tweaks of the .ll test didn't provoke anything. llvm-svn: 268662		2016-05-05 18:38:53 +00:00
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Analysis	[PM] Port Branch Probability Analysis pass to the new pass manager.	2016-05-05 02:59:57 +00:00
Assembler
Bindings
Bitcode
BugPoint
CodeGen	ARM: don't attempt to merge litpools referencing different PC-anchors.	2016-05-05 18:38:53 +00:00
DebugInfo	Reland "Use ScopedPrinter in llvm-pdbdump"	2016-05-04 16:09:04 +00:00
Examples
ExecutionEngine
Feature
FileCheck
Instrumentation	Revert "[asan] add option to set shadow mapping offset"	2016-05-05 01:27:04 +00:00
Integer
JitListener
LibDriver
Linker
LTO
MC	[Hexagon] Add aliases for vector loads/stores with no explicit offset	2016-05-05 18:38:35 +00:00
Object	Clean up the specific error message for a malformed Mach-O files with bad segment	2016-05-05 17:43:35 +00:00
Other	Add opt-bisect support to additional passes that can be skipped	2016-05-03 22:32:30 +00:00
SymbolRewriter
TableGen
ThinLTO/X86	Revert "[ThinLTO] Emit individual index files for distributed backends"	2016-05-05 18:31:00 +00:00
tools	Revert "[ThinLTO] Emit individual index files for distributed backends"	2016-05-05 18:31:00 +00:00
Transforms	[ValueTracking] Improve isImpliedCondition for matching LHS and Imm RHSs.	2016-05-05 15:39:18 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg
lit.site.cfg.in
TestRunner.sh