1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
llvm-mirror/test/MC/AArch64/armv8.5a-bti.s
Oliver Stannard 5be239fc50 [AArch64][v8.5A] Add Branch Target Identification instructions
This adds new instructions used by the Branch Target Identification
feature. When this is enabled, these are the only instructions which can
be targeted by indirect branch instructions.

Patch by Pablo Barrio!

Differential revision: https://reviews.llvm.org/D52485

llvm-svn: 343225
2018-09-27 14:54:33 +00:00

38 lines
1.3 KiB
ArmAsm

// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+bti < %s | FileCheck %s
// RUN: llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=+v8.5a < %s | FileCheck %s
// RUN: not llvm-mc -triple aarch64-none-linux-gnu -show-encoding -mattr=-bti < %s 2>&1 | FileCheck %s --check-prefix=NOBTI
bti
bti c
bti j
bti jc
// CHECK: bti // encoding: [0x1f,0x24,0x03,0xd5]
// CHECK: bti c // encoding: [0x5f,0x24,0x03,0xd5]
// CHECK: bti j // encoding: [0x9f,0x24,0x03,0xd5]
// CHECK: bti jc // encoding: [0xdf,0x24,0x03,0xd5]
// NOBTI: instruction requires: bti
// NOBTI-NEXT: bti
// NOBTI: instruction requires: bti
// NOBTI-NEXT: bti
// NOBTI: instruction requires: bti
// NOBTI-NEXT: bti
// NOBTI: instruction requires: bti
// NOBTI-NEXT: bti
hint #32
hint #34
hint #36
hint #38
// CHECK: bti // encoding: [0x1f,0x24,0x03,0xd5]
// CHECK: bti c // encoding: [0x5f,0x24,0x03,0xd5]
// CHECK: bti j // encoding: [0x9f,0x24,0x03,0xd5]
// CHECK: bti jc // encoding: [0xdf,0x24,0x03,0xd5]
// NOBTI: hint #32 // encoding: [0x1f,0x24,0x03,0xd5]
// NOBTI: hint #34 // encoding: [0x5f,0x24,0x03,0xd5]
// NOBTI: hint #36 // encoding: [0x9f,0x24,0x03,0xd5]
// NOBTI: hint #38 // encoding: [0xdf,0x24,0x03,0xd5]