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llvm-mirror/test/MC/BPF
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Jiong Wang ed8d64ace4 bpf: disassembler support for XADD under sub-register mode 
Like the other load/store instructions, "w" register is preferred when
disassembling BPF_STX | BPF_W | BPF_XADD.

v1 -> v2:
 - Updated testcase insn-unit.s (Yonghong)

Acked-by: Yonghong Song <yhs@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
llvm-svn: 355127
2019-02-28 19:22:34 +00:00
..
insn-unit-32.s [BPF] add code-gen support for JMP32 instructions 2019-02-07 10:43:09 +00:00
insn-unit.s bpf: disassembler support for XADD under sub-register mode 2019-02-28 19:22:34 +00:00
lit.local.cfg
load-store-32.s bpf: disassembler support for XADD under sub-register mode 2019-02-28 19:22:34 +00:00