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19c8a66443
The backend has been around for years, it's pretty ridiculous that we can't even use the preferred form for printing "MOV" aliases. Unfortunately, TableGen can't handle the complex predicates when printing so it's a bunch of nasty C++. Oh well. llvm-svn: 272865
48 lines
1.6 KiB
LLVM
48 lines
1.6 KiB
LLVM
; RUN: llc -O0 -fast-isel-abort=1 -verify-machineinstrs -mtriple=arm64-apple-darwin < %s | FileCheck %s
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@sortlist = common global [5001 x i32] zeroinitializer, align 16
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@sortlist2 = common global [5001 x i64] zeroinitializer, align 16
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; Load an address with an offset larget then LDR imm can handle
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define i32 @foo() nounwind {
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entry:
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; CHECK-LABEL: @foo
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; CHECK: adrp x[[REG:[0-9]+]], _sortlist@GOTPAGE
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; CHECK: ldr x[[REG1:[0-9]+]], [x[[REG]], _sortlist@GOTPAGEOFF]
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; CHECK: mov x[[REG2:[0-9]+]], #20000
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; CHECK: add x[[REG3:[0-9]+]], x[[REG1]], x[[REG2]]
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; CHECK: ldr w0, [x[[REG3]]]
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; CHECK: ret
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%0 = load i32, i32* getelementptr inbounds ([5001 x i32], [5001 x i32]* @sortlist, i32 0, i64 5000), align 4
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ret i32 %0
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}
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define i64 @foo2() nounwind {
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entry:
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; CHECK-LABEL: @foo2
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; CHECK: adrp x[[REG:[0-9]+]], _sortlist2@GOTPAGE
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; CHECK: ldr x[[REG1:[0-9]+]], [x[[REG]], _sortlist2@GOTPAGEOFF]
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; CHECK: mov x[[REG2:[0-9]+]], #40000
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; CHECK: add x[[REG3:[0-9]+]], x[[REG1]], x[[REG2]]
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; CHECK: ldr x0, [x[[REG3]]]
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; CHECK: ret
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%0 = load i64, i64* getelementptr inbounds ([5001 x i64], [5001 x i64]* @sortlist2, i32 0, i64 5000), align 4
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ret i64 %0
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}
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; Load an address with a ridiculously large offset.
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; rdar://12505553
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@pd2 = common global i8* null, align 8
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define signext i8 @foo3() nounwind ssp {
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entry:
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; CHECK-LABEL: @foo3
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; CHECK: mov x[[REG:[0-9]+]], #12343736008704
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; CHECK: movk x[[REG]], #29646, lsl #16
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; CHECK: movk x[[REG]], #12274
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%0 = load i8*, i8** @pd2, align 8
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%arrayidx = getelementptr inbounds i8, i8* %0, i64 12345678901234
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%1 = load i8, i8* %arrayidx, align 1
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ret i8 %1
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}
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