mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 04:32:44 +01:00
1be380d8da
The description of `isGuaranteedToExecute` does not correspond to its implementation. According to description, it should return `true` if an instruction is executed under the assumption that its loop is *entered*. However there is a sophisticated alrogithm inside that tries to prove that the instruction is executed if the loop is *exited*, which is not the same thing for infinite loops. There is an attempt to protect from dealing with infinite loops by prohibiting loops without exit blocks, however an infinite loop can have exit blocks. As result of that, MustExecute can falsely consider some blocks that are never entered as mustexec, and LICM can hoist dangerous instructions out of them basing on this fact. This may introduce UB to programs which did not contain it initially. This patch removes the problematic algorithm and replaced it with a one which tries to prove what is required in description. Differential Revision: https://reviews.llvm.org/D50558 Reviewed By: reames llvm-svn: 339984
112 lines
3.5 KiB
LLVM
112 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
|
|
; RUN: opt -disable-output -print-mustexecute %s 2>&1 | FileCheck %s
|
|
|
|
; Infinite loop.
|
|
; Make sure that the backedge is mustexec.
|
|
define void @test_no_exit_block(i1 %cond, i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @test_no_exit_block(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
|
|
; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
|
|
; CHECK: maybe_taken:
|
|
; CHECK-NOT: mustexec
|
|
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
|
|
; CHECK-NEXT: br label [[BACKEDGE]]
|
|
; CHECK: backedge:
|
|
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
|
|
; CHECK-NEXT: br label [[LOOP]] ; (mustexec in: loop)
|
|
;
|
|
entry:
|
|
br label %loop
|
|
|
|
loop:
|
|
%iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
|
|
br i1 %cond, label %maybe_taken, label %backedge
|
|
|
|
maybe_taken:
|
|
%div = sdiv i32 %a, %b
|
|
br label %backedge
|
|
|
|
backedge:
|
|
%iv.next = add i32 %iv, 1
|
|
br label %loop
|
|
}
|
|
|
|
; Unlike the test before, we can say that backedge is mustexec, which is the
|
|
; correct behavior.
|
|
define void @test_impossible_exit_on_latch(i1 %cond, i32 %a, i32 %b) {
|
|
; CHECK-LABEL: @test_impossible_exit_on_latch(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
|
|
; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
|
|
; CHECK: maybe_taken:
|
|
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
|
|
; CHECK-NEXT: br label [[BACKEDGE]]
|
|
; CHECK: backedge:
|
|
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
|
|
; CHECK-NEXT: br i1 true, label [[LOOP]], label [[EXIT:%.*]] ; (mustexec in: loop)
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
|
|
loop:
|
|
%iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
|
|
br i1 %cond, label %maybe_taken, label %backedge
|
|
|
|
maybe_taken:
|
|
%div = sdiv i32 %a, %b
|
|
br label %backedge
|
|
|
|
backedge:
|
|
%iv.next = add i32 %iv, 1
|
|
br i1 true, label %loop, label %exit
|
|
|
|
exit:
|
|
ret void
|
|
}
|
|
|
|
; Make sure that sdiv is NOT marked as mustexec.
|
|
define void @test_impossible_exit_in_untaken_block(i1 %cond, i32 %a, i32 %b, i32* %p) {
|
|
; CHECK-LABEL: @test_impossible_exit_in_untaken_block(
|
|
; CHECK-NEXT: entry:
|
|
; CHECK-NEXT: br label [[LOOP:%.*]]
|
|
; CHECK: loop:
|
|
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ 0, [[ENTRY:%.*]] ], [ [[IV_NEXT:%.*]], [[BACKEDGE:%.*]] ] ; (mustexec in: loop)
|
|
; CHECK-NEXT: br i1 [[COND:%.*]], label [[MAYBE_TAKEN:%.*]], label [[BACKEDGE]] ; (mustexec in: loop)
|
|
; CHECK: maybe_taken:
|
|
; CHECK-NOT: mustexec
|
|
; CHECK-NEXT: [[DIV:%.*]] = sdiv i32 [[A:%.*]], [[B:%.*]]
|
|
; CHECK-NEXT: store i32 [[DIV]], i32* [[P:%.*]]
|
|
; CHECK-NEXT: br i1 true, label [[BACKEDGE]], label [[EXIT:%.*]]
|
|
; CHECK: backedge:
|
|
; CHECK-NEXT: [[IV_NEXT]] = add i32 [[IV]], 1 ; (mustexec in: loop)
|
|
; CHECK-NEXT: br label [[LOOP]] ; (mustexec in: loop)
|
|
; CHECK: exit:
|
|
; CHECK-NEXT: ret void
|
|
;
|
|
entry:
|
|
br label %loop
|
|
|
|
loop:
|
|
%iv = phi i32 [ 0, %entry ], [ %iv.next, %backedge ]
|
|
br i1 %cond, label %maybe_taken, label %backedge
|
|
|
|
maybe_taken:
|
|
%div = sdiv i32 %a, %b
|
|
store i32 %div, i32* %p
|
|
br i1 true, label %backedge, label %exit
|
|
|
|
backedge:
|
|
%iv.next = add i32 %iv, 1
|
|
br label %loop
|
|
|
|
exit:
|
|
ret void
|
|
}
|