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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00
llvm-mirror/include/llvm/Target
Yaxun Liu 0c1bf45146 CodeGen: Let frame index value type match alloca addr space
Recently alloca address space has been added to data layout. Due to this
change, pointer returned by alloca may have different size as pointer in
address space 0.

However, currently the value type of frame index is assumed to be of the
same size as pointer in address space 0.

This patch fixes that.

Most targets assume alloca returning pointer in address space 0, which
is the default alloca address space. Therefore it is NFC for them.

AMDGCN target with amdgiz environment requires this change since it
assumes alloca returning pointer to addr space 5 and its size is 32,
which is different from the size of pointer in addr space 0 which is 64.

Differential Revision: https://reviews.llvm.org/D32021

llvm-svn: 300864
2017-04-20 18:15:34 +00:00
..
GlobalISel [tablegen][globalisel] Add support for nested instruction matching. 2017-04-04 13:25:23 +00:00
CostTable.h [modules] Add missing include. 2016-08-19 08:30:42 +00:00
GenericOpcodes.td [GlobalISel] Translate shufflevector 2017-03-21 08:44:13 +00:00
Target.td [CodeGen] Update hasSideEffects comment. NFC. 2017-03-19 16:12:45 +00:00
TargetCallingConv.h Elide argument copies during instruction selection 2017-03-01 21:42:00 +00:00
TargetCallingConv.td
TargetFrameLowering.h Target: Remove unused entities. 2016-10-09 04:38:57 +00:00
TargetInstrInfo.h Use methods to access data stored with frame instructions 2017-04-13 14:10:52 +00:00
TargetIntrinsicInfo.h GlobalISel: support translation of intrinsic calls. 2016-07-29 22:32:36 +00:00
TargetItinerary.td Fix comment typos. NFC. 2016-11-20 13:47:59 +00:00
TargetLowering.h CodeGen: Let frame index value type match alloca addr space 2017-04-20 18:15:34 +00:00
TargetLoweringObjectFile.h [Target, Transforms] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC). 2017-01-18 00:57:48 +00:00
TargetMachine.h Revert "Feature generic option to setup start/stop-after/before" 2017-04-01 01:26:24 +00:00
TargetOpcodes.def [GlobalISel] Translate shufflevector 2017-03-21 08:44:13 +00:00
TargetOpcodes.h [GlobalISel] Don't RegBankSelect target-specific instructions. 2016-08-02 11:41:16 +00:00
TargetOptions.h Remove stale and unused (MC)TargetOptions comparators. 2017-03-24 12:50:45 +00:00
TargetRegisterInfo.h Move spill size and alignment info from MC to TargetRegisterInfo 2017-03-24 21:01:16 +00:00
TargetSchedule.td Improve machine schedulers for in-order processors 2017-03-27 20:46:37 +00:00
TargetSelectionDAG.td [SelectionDAG] Add a signed integer absolute ISD node 2017-03-14 21:26:58 +00:00
TargetSubtargetInfo.h This patch closes PR#32216: Better testing of schedule model instruction latencies/throughputs. 2017-04-14 07:44:23 +00:00