1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 04:52:54 +02:00
llvm-mirror/test/CodeGen
Ulrich Weigand 1aae06e395 [PowerPC] Fix invalid displacement created by LocalStackAlloc
This commit fixes a bug in PPCRegisterInfo::isFrameOffsetLegal that
could result in the LocalStackAlloc pass creating an MI instruction
out-of-range displacement:
        %vreg17<def> = LD 33184, %vreg31; mem:LD8[%g](align=32)
        %G8RC:%vreg17 G8RC_and_G8RC_NOX0:%vreg31
(In final assembler output the top bits are stripped off, resulting
in a negative offset loading from below the stack pointer.)

Common code expects the isFrameOffsetLegal routine to verify whether
adding a given offset to the offset already present in the instruction
results in a valid displacement.  However, on PowerPC the routine
did not take the already present instruction offset into account.

This commit fixes isFrameOffsetLegal to add the instruction offset,
and updates a local caller (needsFrameBaseReg) to no longer add the
instruction offset itself before calling isFrameOffsetLegal.

Reviewed by Hal Finkel.

llvm-svn: 212832
2014-07-11 17:19:31 +00:00
..
AArch64 ARM: Allow __fp16 as a function arg or return type for AArch64 2014-07-11 13:33:46 +00:00
ARM ARM: properly lower dllimport'ed global values 2014-07-07 05:18:35 +00:00
CPP IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Generic
Hexagon
Inputs
Mips [mips] Emit two CFI offset directives per double precision SDC1/LDC1 2014-07-10 22:23:30 +00:00
MSP430
NVPTX [NVPTX] Add reflect intrinsic (better than matching by function name) 2014-06-27 18:36:11 +00:00
PowerPC [PowerPC] Fix invalid displacement created by LocalStackAlloc 2014-07-11 17:19:31 +00:00
R600 R600/SI: Use i32 vectors for resources and samplers 2014-07-11 17:11:52 +00:00
SPARC IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
SystemZ IR: add "cmpxchg weak" variant to support permitted failure. 2014-06-13 14:24:07 +00:00
Thumb ARM: Fix fastcc calling convention for Thumb1 2014-06-13 08:33:03 +00:00
Thumb2 ARM: Fix TPsoft for Thumb mode 2014-06-24 15:45:59 +00:00
X86 [X86] Fix the inversion of low and high bits for the lowering of MUL_LOHI. 2014-07-11 12:08:23 +00:00
XCore llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32. 2014-07-04 11:58:03 +00:00