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llvm-mirror/test/MC/AMDGPU
Matt Arsenault 1adcdc6e96 AMDGPU: Add sdst operand to VOP2b instructions
The VOP3 encoding of these allows any SGPR pair for the i1
output, but this was forced before to always use vcc.
This doesn't yet try to use this, but does add the operand
to the definitions so the main change is adding vcc to the
output of the VOP2 encoding.

llvm-svn: 246358
2015-08-29 07:16:50 +00:00
..
ds-err.s
ds.s
flat.s
hsa_code_object_isa_noargs.s
hsa.s AMDGPU/SI: Update amd_kernel_code_t definition and add assembler support 2015-06-26 21:58:31 +00:00
lit.local.cfg
mubuf.s
smrd.s AMDGPU/SI: Add support for 32-bit immediate SMRD offsets on CI 2015-08-06 19:28:38 +00:00
sop1-err.s
sop1.s
sop2.s
sopc.s
sopk.s
sopp.s
vop1.s
vop2-err.s AMDGPU: Add sdst operand to VOP2b instructions 2015-08-29 07:16:50 +00:00
vop2.s AMDGPU: Add sdst operand to VOP2b instructions 2015-08-29 07:16:50 +00:00
vop3-errs.s
vop3.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00
vopc-errs.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00
vopc.s AMDGPU/SI: Use InstAlias instead of MnemonicAlias for VOPC instructions 2015-08-07 22:00:56 +00:00